Commit 63b1bae9 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by David S. Miller

dt-bindings: net: renesas,ether: Update example to match reality

- Drop unneeded interrupt-parent,
  - Convert to new style CPG/MSSR bindings,
  - Add missing power-domains and resets properties,
  - Update PHY subnode:
      - Add example compatible values,
      - Add micrel,led-mode and reset-gpios examples.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1643771e
......@@ -100,15 +100,18 @@ additionalProperties: false
examples:
# Lager board
- |
#include <dt-bindings/clock/r8a7790-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7790-sysc.h>
#include <dt-bindings/gpio/gpio.h>
ethernet@ee700000 {
compatible = "renesas,ether-r8a7790", "renesas,rcar-gen2-ether";
reg = <0xee700000 0x400>;
interrupt-parent = <&gic>;
interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 813>;
phy-mode = "rmii";
phy-handle = <&phy1>;
renesas,ether-link-active-low;
......@@ -116,8 +119,12 @@ examples:
#size-cells = <0>;
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-id0022.1537",
"ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <1>;
reset-gpios = <&gpio5 31 GPIO_ACTIVE_LOW>;
};
};
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment