Commit 63dcf38e authored by Sascha Hauer's avatar Sascha Hauer Committed by Chanwoo Choi

PM / devfreq: rockchip-dfi: introduce channel mask

Different Rockchip SoC variants have a different number of channels.
Introduce a channel mask to make the number of channels configurable
from SoC initialization code.

Link: https://lore.kernel.org/all/20231018061714.3553817-8-s.hauer@pengutronix.de/Reviewed-by: default avatarSebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
parent 99911664
...@@ -18,10 +18,11 @@ ...@@ -18,10 +18,11 @@
#include <linux/list.h> #include <linux/list.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/bits.h>
#include <soc/rockchip/rk3399_grf.h> #include <soc/rockchip/rk3399_grf.h>
#define RK3399_DMC_NUM_CH 2 #define DMC_MAX_CHANNELS 2
/* DDRMON_CTRL */ /* DDRMON_CTRL */
#define DDRMON_CTRL 0x04 #define DDRMON_CTRL 0x04
...@@ -44,7 +45,7 @@ struct dmc_count_channel { ...@@ -44,7 +45,7 @@ struct dmc_count_channel {
}; };
struct dmc_count { struct dmc_count {
struct dmc_count_channel c[RK3399_DMC_NUM_CH]; struct dmc_count_channel c[DMC_MAX_CHANNELS];
}; };
/* /*
...@@ -61,6 +62,8 @@ struct rockchip_dfi { ...@@ -61,6 +62,8 @@ struct rockchip_dfi {
struct regmap *regmap_pmu; struct regmap *regmap_pmu;
struct clk *clk; struct clk *clk;
u32 ddr_type; u32 ddr_type;
unsigned int channel_mask;
unsigned int max_channels;
}; };
static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
...@@ -95,7 +98,9 @@ static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dm ...@@ -95,7 +98,9 @@ static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dm
u32 i; u32 i;
void __iomem *dfi_regs = dfi->regs; void __iomem *dfi_regs = dfi->regs;
for (i = 0; i < RK3399_DMC_NUM_CH; i++) { for (i = 0; i < dfi->max_channels; i++) {
if (!(dfi->channel_mask & BIT(i)))
continue;
count->c[i].access = readl_relaxed(dfi_regs + count->c[i].access = readl_relaxed(dfi_regs +
DDRMON_CH0_DFI_ACCESS_NUM + i * 20); DDRMON_CH0_DFI_ACCESS_NUM + i * 20);
count->c[i].total = readl_relaxed(dfi_regs + count->c[i].total = readl_relaxed(dfi_regs +
...@@ -145,9 +150,14 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev, ...@@ -145,9 +150,14 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev,
rockchip_dfi_read_counters(edev, &count); rockchip_dfi_read_counters(edev, &count);
/* We can only report one channel, so find the busiest one */ /* We can only report one channel, so find the busiest one */
for (i = 0; i < RK3399_DMC_NUM_CH; i++) { for (i = 0; i < dfi->max_channels; i++) {
u32 a = count.c[i].access - last->c[i].access; u32 a, t;
u32 t = count.c[i].total - last->c[i].total;
if (!(dfi->channel_mask & BIT(i)))
continue;
a = count.c[i].access - last->c[i].access;
t = count.c[i].total - last->c[i].total;
if (a > access) { if (a > access) {
access = a; access = a;
...@@ -185,6 +195,9 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi) ...@@ -185,6 +195,9 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi)
dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
RK3399_PMUGRF_DDRTYPE_MASK; RK3399_PMUGRF_DDRTYPE_MASK;
dfi->channel_mask = GENMASK(1, 0);
dfi->max_channels = 2;
return 0; return 0;
}; };
......
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