Commit 63f1e745 authored by Radim Krčmář's avatar Radim Krčmář Committed by Kamal Mostafa

KVM: nVMX: mask unrestricted_guest if disabled on L0

commit 0790ec17 upstream.

If EPT was enabled, unrestricted_guest was allowed in L1 regardless of
L0.  L1 triple faulted when running L2 guest that required emulation.

Another side effect was 'WARN_ON_ONCE(vmx->nested.nested_run_pending)'
in L0's dmesg:
  WARNING: CPU: 0 PID: 0 at arch/x86/kvm/vmx.c:9190 nested_vmx_vmexit+0x96e/0xb00 [kvm_intel] ()

Prevent this scenario by masking SECONDARY_EXEC_UNRESTRICTED_GUEST when
the host doesn't have it enabled.

Fixes: 78051e3b ("KVM: nVMX: Disable unrestricted mode if ept=0")
Tested-By: default avatarKashyap Chamarthy <kchamart@redhat.com>
Signed-off-by: default avatarRadim Krčmář <rkrcmar@redhat.com>
Signed-off-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
[ kamal: backport to 3.13-stable: context ]
Signed-off-by: default avatarKamal Mostafa <kamal@canonical.com>
parent a367d8c0
...@@ -2260,8 +2260,8 @@ static __init void nested_vmx_setup_ctls_msrs(void) ...@@ -2260,8 +2260,8 @@ static __init void nested_vmx_setup_ctls_msrs(void)
if (enable_ept) { if (enable_ept) {
/* nested EPT: emulate EPT also to L1 */ /* nested EPT: emulate EPT also to L1 */
nested_vmx_secondary_ctls_high |= SECONDARY_EXEC_ENABLE_EPT | nested_vmx_secondary_ctls_high |=
SECONDARY_EXEC_UNRESTRICTED_GUEST; SECONDARY_EXEC_ENABLE_EPT;
nested_vmx_ept_caps = VMX_EPT_PAGE_WALK_4_BIT | nested_vmx_ept_caps = VMX_EPT_PAGE_WALK_4_BIT |
VMX_EPTP_WB_BIT | VMX_EPT_2MB_PAGE_BIT | VMX_EPTP_WB_BIT | VMX_EPT_2MB_PAGE_BIT |
VMX_EPT_INVEPT_BIT; VMX_EPT_INVEPT_BIT;
...@@ -2276,6 +2276,10 @@ static __init void nested_vmx_setup_ctls_msrs(void) ...@@ -2276,6 +2276,10 @@ static __init void nested_vmx_setup_ctls_msrs(void)
} else } else
nested_vmx_ept_caps = 0; nested_vmx_ept_caps = 0;
if (enable_unrestricted_guest)
nested_vmx_secondary_ctls_high |=
SECONDARY_EXEC_UNRESTRICTED_GUEST;
/* miscellaneous data */ /* miscellaneous data */
rdmsr(MSR_IA32_VMX_MISC, nested_vmx_misc_low, nested_vmx_misc_high); rdmsr(MSR_IA32_VMX_MISC, nested_vmx_misc_low, nested_vmx_misc_high);
nested_vmx_misc_low &= VMX_MISC_PREEMPTION_TIMER_RATE_MASK | nested_vmx_misc_low &= VMX_MISC_PREEMPTION_TIMER_RATE_MASK |
......
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