Commit 64801369 authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher

drm/amd/display: Fix warnings in DC

Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0d70570f
...@@ -1068,7 +1068,6 @@ bool dc_pre_update_surfaces_to_stream( ...@@ -1068,7 +1068,6 @@ bool dc_pre_update_surfaces_to_stream(
int prev_disp_clk = core_dc->current_context->dispclk_khz; int prev_disp_clk = core_dc->current_context->dispclk_khz;
struct dc_stream_status *stream_status = NULL; struct dc_stream_status *stream_status = NULL;
struct validate_context *context; struct validate_context *context;
struct validate_context *temp_context;
bool ret = true; bool ret = true;
pre_surface_trace(dc, new_surfaces, new_surface_count); pre_surface_trace(dc, new_surfaces, new_surface_count);
...@@ -1425,7 +1424,6 @@ void dc_update_surfaces_for_stream(struct dc *dc, ...@@ -1425,7 +1424,6 @@ void dc_update_surfaces_for_stream(struct dc *dc,
if (update_type == UPDATE_TYPE_FULL) { if (update_type == UPDATE_TYPE_FULL) {
for (j = 0; j < context->res_ctx.pool->pipe_count; j++) { for (j = 0; j < context->res_ctx.pool->pipe_count; j++) {
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
struct core_stream *stream = pipe_ctx->stream;
if (pipe_ctx->surface != surface) if (pipe_ctx->surface != surface)
continue; continue;
......
...@@ -121,7 +121,7 @@ const struct dc_surface_status *dc_surface_get_status( ...@@ -121,7 +121,7 @@ const struct dc_surface_status *dc_surface_get_status(
const struct dc_surface *dc_surface) const struct dc_surface *dc_surface)
{ {
struct dc_surface_status *surface_status; struct dc_surface_status *surface_status;
struct core_surface *core_surface = DC_SURFACE_TO_CORE(dc_surface);; struct core_surface *core_surface = DC_SURFACE_TO_CORE(dc_surface);
struct core_dc *core_dc; struct core_dc *core_dc;
int i; int i;
......
...@@ -292,7 +292,6 @@ static void dce_abm_init(struct abm *abm) ...@@ -292,7 +292,6 @@ static void dce_abm_init(struct abm *abm)
static bool dce_abm_set_level(struct abm *abm, uint32_t level) static bool dce_abm_set_level(struct abm *abm, uint32_t level)
{ {
struct dce_abm *abm_dce = TO_DCE_ABM(abm); struct dce_abm *abm_dce = TO_DCE_ABM(abm);
struct dc_context *ctx = abm_dce->base.ctx;
REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0,
100, 800); 100, 800);
......
...@@ -74,7 +74,6 @@ static bool dce110_timing_generator_v_disable_crtc(struct timing_generator *tg) ...@@ -74,7 +74,6 @@ static bool dce110_timing_generator_v_disable_crtc(struct timing_generator *tg)
static void dce110_timing_generator_v_blank_crtc(struct timing_generator *tg) static void dce110_timing_generator_v_blank_crtc(struct timing_generator *tg)
{ {
struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg);
uint32_t addr = mmCRTCV_BLANK_CONTROL; uint32_t addr = mmCRTCV_BLANK_CONTROL;
uint32_t value = dm_read_reg(tg->ctx, addr); uint32_t value = dm_read_reg(tg->ctx, addr);
......
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