Commit 6542e2b6 authored by David Shah's avatar David Shah Committed by Tony Lindgren

ARM: dts: omap5: Fix DSI base address and clocks

DSI was not probing due to base address off by 0x1000, and sys_clk
missing.

With this patch, the Pyra display works if HDMI is disabled in the
device tree.

Fixes: 5a507162 ("ARM: dts: Configure interconnect target module for omap5 dsi1")
Signed-off-by: default avatarDavid Shah <dave@ds0.me>
Tested-by: default avatarH. Nikolaus Schaller <hns@goldelico.com>
[tony@atomide.com: standardized subject line, added fixes tag]
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent d1db7b80
...@@ -488,11 +488,11 @@ rfbi: encoder@0 { ...@@ -488,11 +488,11 @@ rfbi: encoder@0 {
}; };
}; };
target-module@5000 { target-module@4000 {
compatible = "ti,sysc-omap2", "ti,sysc"; compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x5000 0x4>, reg = <0x4000 0x4>,
<0x5010 0x4>, <0x4010 0x4>,
<0x5014 0x4>; <0x4014 0x4>;
reg-names = "rev", "sysc", "syss"; reg-names = "rev", "sysc", "syss";
ti,sysc-sidle = <SYSC_IDLE_FORCE>, ti,sysc-sidle = <SYSC_IDLE_FORCE>,
<SYSC_IDLE_NO>, <SYSC_IDLE_NO>,
...@@ -504,7 +504,7 @@ SYSC_OMAP2_SOFTRESET | ...@@ -504,7 +504,7 @@ SYSC_OMAP2_SOFTRESET |
ti,syss-mask = <1>; ti,syss-mask = <1>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x5000 0x1000>; ranges = <0 0x4000 0x1000>;
dsi1: encoder@0 { dsi1: encoder@0 {
compatible = "ti,omap5-dsi"; compatible = "ti,omap5-dsi";
...@@ -514,8 +514,9 @@ dsi1: encoder@0 { ...@@ -514,8 +514,9 @@ dsi1: encoder@0 {
reg-names = "proto", "phy", "pll"; reg-names = "proto", "phy", "pll";
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>; clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>,
clock-names = "fck"; <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
}; };
}; };
...@@ -545,8 +546,9 @@ dsi2: encoder@0 { ...@@ -545,8 +546,9 @@ dsi2: encoder@0 {
reg-names = "proto", "phy", "pll"; reg-names = "proto", "phy", "pll";
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>; clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>,
clock-names = "fck"; <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
}; };
}; };
......
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