Commit 6620f45f authored by Neil Armstrong's avatar Neil Armstrong

clk: meson: vid-pll-div: remove warning and return 0 on invalid config

The vid_pll_div is a programmable fractional divider, but vendor gives a
limited of known configuration value and it's corresponding fraction.

Thus when at reset value (0) or unknown value, we cannot determine the
result rate.

The initial behaviour was to print a warning, but the warning triggers
at each boot and when the clock tree is refreshed.

This patch moves the print to debug and returns 0 instead of the
parent rate.

Fixes: 72dbb8c9 ("clk: meson: Add vid_pll divider driver")
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190327151348.27402-1-narmstrong@baylibre.com
parent d6f987c8
...@@ -82,8 +82,8 @@ static unsigned long meson_vid_pll_div_recalc_rate(struct clk_hw *hw, ...@@ -82,8 +82,8 @@ static unsigned long meson_vid_pll_div_recalc_rate(struct clk_hw *hw,
div = _get_table_val(meson_parm_read(clk->map, &pll_div->val), div = _get_table_val(meson_parm_read(clk->map, &pll_div->val),
meson_parm_read(clk->map, &pll_div->sel)); meson_parm_read(clk->map, &pll_div->sel));
if (!div || !div->divider) { if (!div || !div->divider) {
pr_info("%s: Invalid config value for vid_pll_div\n", __func__); pr_debug("%s: Invalid config value for vid_pll_div\n", __func__);
return parent_rate; return 0;
} }
return DIV_ROUND_UP_ULL(parent_rate * div->multiplier, div->divider); return DIV_ROUND_UP_ULL(parent_rate * div->multiplier, div->divider);
......
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