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Commit 662146b1 authored by Arnd Bergmann's avatar Arnd Bergmann
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ARM: gemini: get platform to build again 

There is no defconfig file for gemini, which has lead to a lot
of bitrot. This makes the broken board files, the gpio implementation
and the reset logic work again, and fixes the build warnings
that got introduced with the changes to the readl/writel prototypes.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent f6161aa1
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Showing with 34 additions and 25 deletions
arch/arm/Kconfig
View file @ 662146b1
...@@ -411,6 +411,7 @@ config ARCH_GEMINI ...@@ -411,6 +411,7 @@ config ARCH_GEMINI
bool "Cortina Systems Gemini" bool "Cortina Systems Gemini"
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_GPIO_H
select CPU_FA526 select CPU_FA526
help help
Support for the Cortina Systems Gemini family SoCs Support for the Cortina Systems Gemini family SoCs
......
arch/arm/mach-gemini/Makefile
View file @ 662146b1
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
# Object file lists. # Object file lists.
obj-y := irq.o mm.o time.o devices.o gpio.o idle.o obj-y := irq.o mm.o time.o devices.o gpio.o idle.o reset.o
# Board-specific support # Board-specific support
obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o
......
arch/arm/mach-gemini/board-nas4220b.c
View file @ 662146b1
...@@ -103,4 +103,5 @@ MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B") ...@@ -103,4 +103,5 @@ MACHINE_START(NAS4220B, "Raidsonic NAS IB-4220-B")
.init_irq = gemini_init_irq, .init_irq = gemini_init_irq,
.init_time = gemini_timer_init, .init_time = gemini_timer_init,
.init_machine = ib4220b_init, .init_machine = ib4220b_init,
.restart = gemini_restart,
MACHINE_END MACHINE_END
arch/arm/mach-gemini/board-rut1xx.c
View file @ 662146b1
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <linux/leds.h> #include <linux/leds.h>
#include <linux/input.h> #include <linux/input.h>
#include <linux/gpio_keys.h> #include <linux/gpio_keys.h>
#include <linux/sizes.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
...@@ -87,4 +88,5 @@ MACHINE_START(RUT100, "Teltonika RUT100") ...@@ -87,4 +88,5 @@ MACHINE_START(RUT100, "Teltonika RUT100")
.init_irq = gemini_init_irq, .init_irq = gemini_init_irq,
.init_time = gemini_timer_init, .init_time = gemini_timer_init,
.init_machine = rut1xx_init, .init_machine = rut1xx_init,
.restart = gemini_restart,
MACHINE_END MACHINE_END
arch/arm/mach-gemini/board-wbd111.c
View file @ 662146b1
...@@ -130,4 +130,5 @@ MACHINE_START(WBD111, "Wiliboard WBD-111") ...@@ -130,4 +130,5 @@ MACHINE_START(WBD111, "Wiliboard WBD-111")
.init_irq = gemini_init_irq, .init_irq = gemini_init_irq,
.init_time = gemini_timer_init, .init_time = gemini_timer_init,
.init_machine = wbd111_init, .init_machine = wbd111_init,
.restart = gemini_restart,
MACHINE_END MACHINE_END
arch/arm/mach-gemini/board-wbd222.c
View file @ 662146b1
...@@ -130,4 +130,5 @@ MACHINE_START(WBD222, "Wiliboard WBD-222") ...@@ -130,4 +130,5 @@ MACHINE_START(WBD222, "Wiliboard WBD-222")
.init_irq = gemini_init_irq, .init_irq = gemini_init_irq,
.init_time = gemini_timer_init, .init_time = gemini_timer_init,
.init_machine = wbd222_init, .init_machine = wbd222_init,
.restart = gemini_restart,
MACHINE_END MACHINE_END
arch/arm/mach-gemini/common.h
View file @ 662146b1
...@@ -26,4 +26,6 @@ extern int platform_register_pflash(unsigned int size, ...@@ -26,4 +26,6 @@ extern int platform_register_pflash(unsigned int size,
struct mtd_partition *parts, struct mtd_partition *parts,
unsigned int nr_parts); unsigned int nr_parts);
extern void gemini_restart(char mode, const char *cmd);
#endif /* __GEMINI_COMMON_H__ */ #endif /* __GEMINI_COMMON_H__ */
arch/arm/mach-gemini/gpio.c
View file @ 662146b1
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/irqs.h> #include <mach/irqs.h>
#include <mach/gpio.h>
#define GPIO_BASE(x) IO_ADDRESS(GEMINI_GPIO_BASE(x)) #define GPIO_BASE(x) IO_ADDRESS(GEMINI_GPIO_BASE(x))
...@@ -44,7 +45,7 @@ ...@@ -44,7 +45,7 @@
#define GPIO_PORT_NUM 3 #define GPIO_PORT_NUM 3
static void _set_gpio_irqenable(unsigned int base, unsigned int index, static void _set_gpio_irqenable(void __iomem *base, unsigned int index,
int enable) int enable)
{ {
unsigned int reg; unsigned int reg;
...@@ -57,7 +58,7 @@ static void _set_gpio_irqenable(unsigned int base, unsigned int index, ...@@ -57,7 +58,7 @@ static void _set_gpio_irqenable(unsigned int base, unsigned int index,
static void gpio_ack_irq(struct irq_data *d) static void gpio_ack_irq(struct irq_data *d)
{ {
unsigned int gpio = irq_to_gpio(d->irq); unsigned int gpio = irq_to_gpio(d->irq);
unsigned int base = GPIO_BASE(gpio / 32); void __iomem *base = GPIO_BASE(gpio / 32);
__raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR); __raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR);
} }
...@@ -65,7 +66,7 @@ static void gpio_ack_irq(struct irq_data *d) ...@@ -65,7 +66,7 @@ static void gpio_ack_irq(struct irq_data *d)
static void gpio_mask_irq(struct irq_data *d) static void gpio_mask_irq(struct irq_data *d)
{ {
unsigned int gpio = irq_to_gpio(d->irq); unsigned int gpio = irq_to_gpio(d->irq);
unsigned int base = GPIO_BASE(gpio / 32); void __iomem *base = GPIO_BASE(gpio / 32);
_set_gpio_irqenable(base, gpio % 32, 0); _set_gpio_irqenable(base, gpio % 32, 0);
} }
...@@ -73,7 +74,7 @@ static void gpio_mask_irq(struct irq_data *d) ...@@ -73,7 +74,7 @@ static void gpio_mask_irq(struct irq_data *d)
static void gpio_unmask_irq(struct irq_data *d) static void gpio_unmask_irq(struct irq_data *d)
{ {
unsigned int gpio = irq_to_gpio(d->irq); unsigned int gpio = irq_to_gpio(d->irq);
unsigned int base = GPIO_BASE(gpio / 32); void __iomem *base = GPIO_BASE(gpio / 32);
_set_gpio_irqenable(base, gpio % 32, 1); _set_gpio_irqenable(base, gpio % 32, 1);
} }
...@@ -82,7 +83,7 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type) ...@@ -82,7 +83,7 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
{ {
unsigned int gpio = irq_to_gpio(d->irq); unsigned int gpio = irq_to_gpio(d->irq);
unsigned int gpio_mask = 1 << (gpio % 32); unsigned int gpio_mask = 1 << (gpio % 32);
unsigned int base = GPIO_BASE(gpio / 32); void __iomem *base = GPIO_BASE(gpio / 32);
unsigned int reg_both, reg_level, reg_type; unsigned int reg_both, reg_level, reg_type;
reg_type = __raw_readl(base + GPIO_INT_TYPE); reg_type = __raw_readl(base + GPIO_INT_TYPE);
...@@ -120,7 +121,7 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type) ...@@ -120,7 +121,7 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
__raw_writel(reg_level, base + GPIO_INT_LEVEL); __raw_writel(reg_level, base + GPIO_INT_LEVEL);
__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE); __raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
gpio_ack_irq(d->irq); gpio_ack_irq(d);
return 0; return 0;
} }
...@@ -153,7 +154,7 @@ static struct irq_chip gpio_irq_chip = { ...@@ -153,7 +154,7 @@ static struct irq_chip gpio_irq_chip = {
static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset,
int dir) int dir)
{ {
unsigned int base = GPIO_BASE(offset / 32); void __iomem *base = GPIO_BASE(offset / 32);
unsigned int reg; unsigned int reg;
reg = __raw_readl(base + GPIO_DIR); reg = __raw_readl(base + GPIO_DIR);
...@@ -166,7 +167,7 @@ static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, ...@@ -166,7 +167,7 @@ static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset,
static void gemini_gpio_set(struct gpio_chip *chip, unsigned offset, int value) static void gemini_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
{ {
unsigned int base = GPIO_BASE(offset / 32); void __iomem *base = GPIO_BASE(offset / 32);
if (value) if (value)
__raw_writel(1 << (offset % 32), base + GPIO_DATA_SET); __raw_writel(1 << (offset % 32), base + GPIO_DATA_SET);
...@@ -176,7 +177,7 @@ static void gemini_gpio_set(struct gpio_chip *chip, unsigned offset, int value) ...@@ -176,7 +177,7 @@ static void gemini_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
static int gemini_gpio_get(struct gpio_chip *chip, unsigned offset) static int gemini_gpio_get(struct gpio_chip *chip, unsigned offset)
{ {
unsigned int base = GPIO_BASE(offset / 32); void __iomem *base = GPIO_BASE(offset / 32);
return (__raw_readl(base + GPIO_DATA_IN) >> (offset % 32)) & 1; return (__raw_readl(base + GPIO_DATA_IN) >> (offset % 32)) & 1;
} }
......
arch/arm/mach-gemini/include/mach/hardware.h
View file @ 662146b1
...@@ -69,6 +69,6 @@ ...@@ -69,6 +69,6 @@
/* /*
* macro to get at IO space when running virtually * macro to get at IO space when running virtually
*/ */
#define IO_ADDRESS(x) ((((x) & 0xFFF00000) >> 4) | ((x) & 0x000FFFFF) | 0xF0000000) #define IO_ADDRESS(x) IOMEM((((x) & 0xFFF00000) >> 4) | ((x) & 0x000FFFFF) | 0xF0000000)
#endif #endif
arch/arm/mach-gemini/irq.c
View file @ 662146b1
...@@ -65,8 +65,8 @@ static struct irq_chip gemini_irq_chip = { ...@@ -65,8 +65,8 @@ static struct irq_chip gemini_irq_chip = {
static struct resource irq_resource = { static struct resource irq_resource = {
.name = "irq_handler", .name = "irq_handler",
.start = IO_ADDRESS(GEMINI_INTERRUPT_BASE), .start = GEMINI_INTERRUPT_BASE,
.end = IO_ADDRESS(FIQ_STATUS(GEMINI_INTERRUPT_BASE)) + 4, .end = FIQ_STATUS(GEMINI_INTERRUPT_BASE) + 4,
}; };
void __init gemini_init_irq(void) void __init gemini_init_irq(void)
......
arch/arm/mach-gemini/mm.c
View file @ 662146b1
...@@ -19,57 +19,57 @@ ...@@ -19,57 +19,57 @@
/* Page table mapping for I/O region */ /* Page table mapping for I/O region */
static struct map_desc gemini_io_desc[] __initdata = { static struct map_desc gemini_io_desc[] __initdata = {
{ {
.virtual = IO_ADDRESS(GEMINI_GLOBAL_BASE), .virtual = (unsigned long)IO_ADDRESS(GEMINI_GLOBAL_BASE),
.pfn =__phys_to_pfn(GEMINI_GLOBAL_BASE), .pfn =__phys_to_pfn(GEMINI_GLOBAL_BASE),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_UART_BASE), .virtual = (unsigned long)IO_ADDRESS(GEMINI_UART_BASE),
.pfn = __phys_to_pfn(GEMINI_UART_BASE), .pfn = __phys_to_pfn(GEMINI_UART_BASE),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_TIMER_BASE), .virtual = (unsigned long)IO_ADDRESS(GEMINI_TIMER_BASE),
.pfn = __phys_to_pfn(GEMINI_TIMER_BASE), .pfn = __phys_to_pfn(GEMINI_TIMER_BASE),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_INTERRUPT_BASE), .virtual = (unsigned long)IO_ADDRESS(GEMINI_INTERRUPT_BASE),
.pfn = __phys_to_pfn(GEMINI_INTERRUPT_BASE), .pfn = __phys_to_pfn(GEMINI_INTERRUPT_BASE),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_POWER_CTRL_BASE), .virtual = (unsigned long)IO_ADDRESS(GEMINI_POWER_CTRL_BASE),
.pfn = __phys_to_pfn(GEMINI_POWER_CTRL_BASE), .pfn = __phys_to_pfn(GEMINI_POWER_CTRL_BASE),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_GPIO_BASE(0)), .virtual = (unsigned long)IO_ADDRESS(GEMINI_GPIO_BASE(0)),
.pfn = __phys_to_pfn(GEMINI_GPIO_BASE(0)), .pfn = __phys_to_pfn(GEMINI_GPIO_BASE(0)),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_GPIO_BASE(1)), .virtual = (unsigned long)IO_ADDRESS(GEMINI_GPIO_BASE(1)),
.pfn = __phys_to_pfn(GEMINI_GPIO_BASE(1)), .pfn = __phys_to_pfn(GEMINI_GPIO_BASE(1)),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_GPIO_BASE(2)), .virtual = (unsigned long)IO_ADDRESS(GEMINI_GPIO_BASE(2)),
.pfn = __phys_to_pfn(GEMINI_GPIO_BASE(2)), .pfn = __phys_to_pfn(GEMINI_GPIO_BASE(2)),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_FLASH_CTRL_BASE), .virtual = (unsigned long)IO_ADDRESS(GEMINI_FLASH_CTRL_BASE),
.pfn = __phys_to_pfn(GEMINI_FLASH_CTRL_BASE), .pfn = __phys_to_pfn(GEMINI_FLASH_CTRL_BASE),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_DRAM_CTRL_BASE), .virtual = (unsigned long)IO_ADDRESS(GEMINI_DRAM_CTRL_BASE),
.pfn = __phys_to_pfn(GEMINI_DRAM_CTRL_BASE), .pfn = __phys_to_pfn(GEMINI_DRAM_CTRL_BASE),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(GEMINI_GENERAL_DMA_BASE), .virtual = (unsigned long)IO_ADDRESS(GEMINI_GENERAL_DMA_BASE),
.pfn = __phys_to_pfn(GEMINI_GENERAL_DMA_BASE), .pfn = __phys_to_pfn(GEMINI_GENERAL_DMA_BASE),
.length = SZ_512K, .length = SZ_512K,
.type = MT_DEVICE, .type = MT_DEVICE,
......
arch/arm/mach-gemini/include/mach/system.h → arch/arm/mach-gemini/reset.c
View file @ 662146b1
...@@ -14,7 +14,7 @@ ...@@ -14,7 +14,7 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/global_reg.h> #include <mach/global_reg.h>
static inline void arch_reset(char mode, const char *cmd) void gemini_restart(char mode, const char *cmd)
{ {
__raw_writel(RESET_GLOBAL | RESET_CPU1, __raw_writel(RESET_GLOBAL | RESET_CPU1,
IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_RESET); IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_RESET);
......
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