Commit 6653672a authored by Lee Jones's avatar Lee Jones Committed by Alex Deucher

drm/radeon/r600: Fix a misnamed parameter description and a formatting issue

Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/radeon/r600.c:2965: warning: Function parameter or member 'resv' not described in 'r600_copy_cpdma'
 drivers/gpu/drm/radeon/r600.c:2965: warning: Excess function parameter 'fence' description in 'r600_copy_cpdma'
 drivers/gpu/drm/radeon/r600.c:4382: warning: Function parameter or member 'rdev' not described in 'r600_mmio_hdp_flush'

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-media@vger.kernel.org
Cc: linaro-mm-sig@lists.linaro.org
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3af7bbe2
...@@ -2953,7 +2953,7 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev, ...@@ -2953,7 +2953,7 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev,
* @src_offset: src GPU address * @src_offset: src GPU address
* @dst_offset: dst GPU address * @dst_offset: dst GPU address
* @num_gpu_pages: number of GPU pages to xfer * @num_gpu_pages: number of GPU pages to xfer
* @fence: radeon fence object * @resv: DMA reservation object to manage fences
* *
* Copy GPU paging using the CP DMA engine (r6xx+). * Copy GPU paging using the CP DMA engine (r6xx+).
* Used by the radeon ttm implementation to move pages if * Used by the radeon ttm implementation to move pages if
...@@ -4372,7 +4372,7 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev) ...@@ -4372,7 +4372,7 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev)
/** /**
* r600_mmio_hdp_flush - flush Host Data Path cache via MMIO * r600_mmio_hdp_flush - flush Host Data Path cache via MMIO
* rdev: radeon device structure * @rdev: radeon device structure
* *
* Some R6XX/R7XX don't seem to take into account HDP flushes performed * Some R6XX/R7XX don't seem to take into account HDP flushes performed
* through the ring buffer. This leads to corruption in rendering, see * through the ring buffer. This leads to corruption in rendering, see
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment