ARM: dts: rockchip: add phandles to secondary cpu cores

Add phandles to secondary cpu cores as we may need to reference these
down the road as well.
Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>

arch/arm/boot/dts/rk3188.dtsi

@@ -28,7 +28,7 @@ cpu0: cpu@0 {
 			operating-points-v2 = <&cpu0_opp_table>;
 			resets = <&cru SRST_CORE0>;
 		};
-		cpu@1 {
+		cpu1: cpu@1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
@@ -36,7 +36,7 @@ cpu@1 {
 			operating-points-v2 = <&cpu0_opp_table>;
 			resets = <&cru SRST_CORE1>;
 		};
-		cpu@2 {
+		cpu2: cpu@2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
@@ -44,7 +44,7 @@ cpu@2 {
 			operating-points-v2 = <&cpu0_opp_table>;
 			resets = <&cru SRST_CORE2>;
 		};
-		cpu@3 {
+		cpu3: cpu@3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;