Commit 66dde2b0 authored by Paul Burton's avatar Paul Burton Committed by David S. Miller

net: pch_gbe: Remove sw_reset_phy HAL abstraction

For some reason the pch_gbe driver contains a struct pch_gbe_functions
with pointers used by a HAL abstraction layer, even though there is only
one implementation of each function.

This patch removes the sw_reset_phy abstraction, which it turns out is
never even used. Its one implementation, which is already called
directly within the same translation unit, can therefore be made static
and removed from the pch_gbe_phy.h header.
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9c020d7b
...@@ -335,7 +335,6 @@ struct pch_gbe_hw; ...@@ -335,7 +335,6 @@ struct pch_gbe_hw;
* @read_phy_reg: for pch_gbe_hal_read_phy_reg * @read_phy_reg: for pch_gbe_hal_read_phy_reg
* @write_phy_reg: for pch_gbe_hal_write_phy_reg * @write_phy_reg: for pch_gbe_hal_write_phy_reg
* @reset_phy: for pch_gbe_hal_phy_hw_reset * @reset_phy: for pch_gbe_hal_phy_hw_reset
* @sw_reset_phy: for pch_gbe_hal_phy_sw_reset
*/ */
struct pch_gbe_functions { struct pch_gbe_functions {
void (*get_bus_info) (struct pch_gbe_hw *); void (*get_bus_info) (struct pch_gbe_hw *);
...@@ -343,7 +342,6 @@ struct pch_gbe_functions { ...@@ -343,7 +342,6 @@ struct pch_gbe_functions {
s32 (*read_phy_reg) (struct pch_gbe_hw *, u32, u16 *); s32 (*read_phy_reg) (struct pch_gbe_hw *, u32, u16 *);
s32 (*write_phy_reg) (struct pch_gbe_hw *, u32, u16); s32 (*write_phy_reg) (struct pch_gbe_hw *, u32, u16);
void (*reset_phy) (struct pch_gbe_hw *); void (*reset_phy) (struct pch_gbe_hw *);
void (*sw_reset_phy) (struct pch_gbe_hw *);
}; };
/** /**
......
...@@ -89,7 +89,6 @@ static const struct pch_gbe_functions pch_gbe_ops = { ...@@ -89,7 +89,6 @@ static const struct pch_gbe_functions pch_gbe_ops = {
.read_phy_reg = pch_gbe_phy_read_reg_miic, .read_phy_reg = pch_gbe_phy_read_reg_miic,
.write_phy_reg = pch_gbe_phy_write_reg_miic, .write_phy_reg = pch_gbe_phy_write_reg_miic,
.reset_phy = pch_gbe_phy_hw_reset, .reset_phy = pch_gbe_phy_hw_reset,
.sw_reset_phy = pch_gbe_phy_sw_reset,
}; };
/** /**
...@@ -204,18 +203,3 @@ void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw) ...@@ -204,18 +203,3 @@ void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw)
} }
hw->func->reset_phy(hw); hw->func->reset_phy(hw);
} }
/**
* pch_gbe_hal_phy_sw_reset - Soft PHY reset
* @hw: Pointer to the HW structure
*/
void pch_gbe_hal_phy_sw_reset(struct pch_gbe_hw *hw)
{
if (!hw->func->sw_reset_phy) {
struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
netdev_err(adapter->netdev, "ERROR: configuration\n");
return;
}
hw->func->sw_reset_phy(hw);
}
...@@ -27,6 +27,5 @@ s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw); ...@@ -27,6 +27,5 @@ s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw);
s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 *data); s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 *data);
s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 data); s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 data);
void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw); void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw);
void pch_gbe_hal_phy_sw_reset(struct pch_gbe_hw *hw);
#endif #endif
...@@ -184,7 +184,7 @@ s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data) ...@@ -184,7 +184,7 @@ s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data)
* pch_gbe_phy_sw_reset - PHY software reset * pch_gbe_phy_sw_reset - PHY software reset
* @hw: Pointer to the HW structure * @hw: Pointer to the HW structure
*/ */
void pch_gbe_phy_sw_reset(struct pch_gbe_hw *hw) static void pch_gbe_phy_sw_reset(struct pch_gbe_hw *hw)
{ {
u16 phy_ctrl; u16 phy_ctrl;
......
...@@ -26,7 +26,6 @@ ...@@ -26,7 +26,6 @@
s32 pch_gbe_phy_get_id(struct pch_gbe_hw *hw); s32 pch_gbe_phy_get_id(struct pch_gbe_hw *hw);
s32 pch_gbe_phy_read_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 *data); s32 pch_gbe_phy_read_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 *data);
s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data); s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data);
void pch_gbe_phy_sw_reset(struct pch_gbe_hw *hw);
void pch_gbe_phy_hw_reset(struct pch_gbe_hw *hw); void pch_gbe_phy_hw_reset(struct pch_gbe_hw *hw);
void pch_gbe_phy_power_up(struct pch_gbe_hw *hw); void pch_gbe_phy_power_up(struct pch_gbe_hw *hw);
void pch_gbe_phy_power_down(struct pch_gbe_hw *hw); void pch_gbe_phy_power_down(struct pch_gbe_hw *hw);
......
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