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Commit 67b74588 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'qcom-arm64-fixes-for-6.1' of... 

Merge tag 'qcom-arm64-fixes-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes

Qualcomm ARM64 DTS fixes for 6.1

This fixes the APCS register region on IPQ8074 to not overlap
with adjacent nodes.

It lists the valid LDO modes on a variety of platforms, as this is not
required by the binding and implementation.

The reference clocks for the two UFS instances on SC8280XP are
corrected, to avoid relying on the state left by most versions of the
bootloader.

A number of issues are corrected with regards to the QMP PHY register
ranges on SC8280XP.

SC7280 gains a missing lpass reset region.

Lastly cluster idle is termporarily disabled on SM8250 to avoid issues
with booting the platform, until the last missing pieces lands.

* tag 'qcom-arm64-fixes-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: dts: qcom: sm8250: Disable the not yet supported cluster idle state
  arm64: dts: qcom: sc7280: Add the reset reg for lpass audiocc on SC7280
  arm64: dts: qcom: sc8280xp: fix UFS PHY serdes size
  arm64: dts: qcom: sc8280xp: drop broken DP PHY nodes
  arm64: dts: qcom: sc8280xp: fix USB PHY PCS registers
  arm64: dts: qcom: sc8280xp: fix USB1 PHY RX1 registers
  arm64: dts: qcom: sc8280xp: fix USB0 PHY PCS_MISC registers
  arm64: dts: qcom: sc8280xp: correct ref clock for ufs_mem_phy
  arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock
  arm64: dts: qcom: sm8350-hdk: Specify which LDO modes are allowed
  arm64: dts: qcom: sm8250-xperia-edo: Specify which LDO modes are allowed
  arm64: dts: qcom: sm8150-xperia-kumano: Specify which LDO modes are allowed
  arm64: dts: qcom: sc8280xp-crd: Specify which LDO modes are allowed
  arm64: dts: qcom: sa8295p-adp: Specify which LDO modes are allowed
  arm64: dts: qcom: sa8155p-adp: Specify which LDO modes are allowed
  Revert "arm64: dts: qcom: msm8996: add missing TCSR syscon compatible"
  arm64: dts: qcom: ipq8074: correct APCS register space size

Link: https://lore.kernel.org/r/20221110040635.795921-1-andersson@kernel.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 5449cabd cadaa773
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Showing with 67 additions and 32 deletions
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View file @ 67b74588
......@@ -668,7 +668,7 @@ watchdog: watchdog@b017000 {
apcs_glb: mailbox@b111000 {
compatible = "qcom,ipq8074-apcs-apps-global";
reg = <0x0b111000 0x6000>;
reg = <0x0b111000 0x1000>;
#clock-cells = <1>;
#mbox-cells = <1>;
......
arch/arm64/boot/dts/qcom/msm8996.dtsi
View file @ 67b74588
......@@ -3504,7 +3504,7 @@ frame@98c0000 {
};
saw3: syscon@9a10000 {
compatible = "qcom,tcsr-msm8996", "syscon";
compatible = "syscon";
reg = <0x09a10000 0x1000>;
};
......
arch/arm64/boot/dts/qcom/sa8155p-adp.dts
View file @ 67b74588
......@@ -43,7 +43,6 @@ vreg_s4a_1p8: smps4 {
regulator-always-on;
regulator-boot-on;
regulator-allow-set-load;
vin-supply = <&vreg_3p3>;
};
......@@ -137,6 +136,9 @@ vreg_l5a_0p88: ldo5 {
regulator-max-microvolt = <880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7a_1p8: ldo7 {
......@@ -152,6 +154,9 @@ vreg_l10a_2p96: ldo10 {
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l11a_0p8: ldo11 {
......@@ -258,6 +263,9 @@ vreg_l5c_1p2: ldo5 {
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7c_1p8: ldo7 {
......@@ -273,6 +281,9 @@ vreg_l8c_1p2: ldo8 {
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10c_3p3: ldo10 {
......
arch/arm64/boot/dts/qcom/sa8295p-adp.dts
View file @ 67b74588
......@@ -83,6 +83,9 @@ vreg_l3c: ldo3 {
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l4c: ldo4 {
......@@ -98,6 +101,9 @@ vreg_l6c: ldo6 {
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7c: ldo7 {
......@@ -113,6 +119,9 @@ vreg_l10c: ldo10 {
regulator-max-microvolt = <2504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l17c: ldo17 {
......@@ -121,6 +130,9 @@ vreg_l17c: ldo17 {
regulator-max-microvolt = <2504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
};
......
arch/arm64/boot/dts/qcom/sc7280.dtsi
View file @ 67b74588
......@@ -2296,7 +2296,8 @@ swr1: soundwire@3230000 {
lpass_audiocc: clock-controller@3300000 {
compatible = "qcom,sc7280-lpassaudiocc";
reg = <0 0x03300000 0 0x30000>;
reg = <0 0x03300000 0 0x30000>,
<0 0x032a9000 0 0x1000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
......
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
View file @ 67b74588
......@@ -124,6 +124,9 @@ vreg_l7c: ldo7 {
regulator-max-microvolt = <2504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13c: ldo13 {
......@@ -146,6 +149,9 @@ vreg_l3d: ldo3 {
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l4d: ldo4 {
......
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
View file @ 67b74588
......@@ -885,13 +885,13 @@ ufs_mem_hc: ufs@1d84000 {
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sc8280xp-qmp-ufs-phy";
reg = <0 0x01d87000 0 0xe10>;
reg = <0 0x01d87000 0 0x1c8>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clock-names = "ref",
"ref_aux";
clocks = <&rpmhcc RPMH_CXO_CLK>,
clocks = <&gcc GCC_UFS_REF_CLKREF_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
resets = <&ufs_mem_hc 0>;
......@@ -953,13 +953,13 @@ ufs_card_hc: ufs@1da4000 {
ufs_card_phy: phy@1da7000 {
compatible = "qcom,sc8280xp-qmp-ufs-phy";
reg = <0 0x01da7000 0 0xe10>;
reg = <0 0x01da7000 0 0x1c8>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clock-names = "ref",
"ref_aux";
clocks = <&gcc GCC_UFS_1_CARD_CLKREF_CLK>,
clocks = <&gcc GCC_UFS_REF_CLKREF_CLK>,
<&gcc GCC_UFS_CARD_PHY_AUX_CLK>;
resets = <&ufs_card_hc 0>;
......@@ -1181,26 +1181,16 @@ usb_0_qmpphy: phy-wrapper@88ec000 {
usb_0_ssphy: usb3-phy@88eb400 {
reg = <0 0x088eb400 0 0x100>,
<0 0x088eb600 0 0x3ec>,
<0 0x088ec400 0 0x1f0>,
<0 0x088ec400 0 0x364>,
<0 0x088eba00 0 0x100>,
<0 0x088ebc00 0 0x3ec>,
<0 0x088ec700 0 0x64>;
<0 0x088ec200 0 0x18>;
#phy-cells = <0>;
#clock-cells = <0>;
clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "usb0_phy_pipe_clk_src";
};
usb_0_dpphy: dp-phy@88ed200 {
reg = <0 0x088ed200 0 0x200>,
<0 0x088ed400 0 0x200>,
<0 0x088eda00 0 0x200>,
<0 0x088ea600 0 0x200>,
<0 0x088ea800 0 0x200>;
#clock-cells = <1>;
#phy-cells = <0>;
};
};
usb_1_hsphy: phy@8902000 {
......@@ -1242,8 +1232,8 @@ usb_1_qmpphy: phy-wrapper@8904000 {
usb_1_ssphy: usb3-phy@8903400 {
reg = <0 0x08903400 0 0x100>,
<0 0x08903c00 0 0x3ec>,
<0 0x08904400 0 0x1f0>,
<0 0x08903600 0 0x3ec>,
<0 0x08904400 0 0x364>,
<0 0x08903a00 0 0x100>,
<0 0x08903c00 0 0x3ec>,
<0 0x08904200 0 0x18>;
......@@ -1253,16 +1243,6 @@ usb_1_ssphy: usb3-phy@8903400 {
clock-names = "pipe0";
clock-output-names = "usb1_phy_pipe_clk_src";
};
usb_1_dpphy: dp-phy@8904200 {
reg = <0 0x08904200 0 0x200>,
<0 0x08904400 0 0x200>,
<0 0x08904a00 0 0x200>,
<0 0x08904600 0 0x200>,
<0 0x08904800 0 0x200>;
#clock-cells = <1>;
#phy-cells = <0>;
};
};
system-cache-controller@9200000 {
......
arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi
View file @ 67b74588
......@@ -348,6 +348,9 @@ vreg_l6c_2p9: ldo6 {
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7c_3p0: ldo7 {
......@@ -367,6 +370,9 @@ vreg_l9c_2p9: ldo9 {
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10c_3p3: ldo10 {
......
arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
View file @ 67b74588
......@@ -317,6 +317,9 @@ vreg_l6c_2p9: ldo6 {
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7c_2p85: ldo7 {
......@@ -339,6 +342,9 @@ vreg_l9c_2p9: ldo9 {
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10c_3p3: ldo10 {
......
arch/arm64/boot/dts/qcom/sm8250.dtsi
View file @ 67b74588
......@@ -334,6 +334,7 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
exit-latency-us = <6562>;
min-residency-us = <9987>;
local-timer-stop;
status = "disabled";
};
};
};
......
arch/arm64/boot/dts/qcom/sm8350-hdk.dts
View file @ 67b74588
......@@ -107,6 +107,9 @@ vreg_l5b_0p88: ldo5 {
regulator-max-microvolt = <888000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6b_1p2: ldo6 {
......@@ -115,6 +118,9 @@ vreg_l6b_1p2: ldo6 {
regulator-max-microvolt = <1208000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7b_2p96: ldo7 {
......@@ -123,6 +129,9 @@ vreg_l7b_2p96: ldo7 {
regulator-max-microvolt = <2504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9b_1p2: ldo9 {
......@@ -131,6 +140,9 @@ vreg_l9b_1p2: ldo9 {
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-allow-set-load;
regulator-allowed-modes =
<RPMH_REGULATOR_MODE_LPM
RPMH_REGULATOR_MODE_HPM>;
};
};
......
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