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Commit 68d41f23 authored by Linus Walleij's avatar Linus Walleij
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pinctrl: nomadik: force-convert to generic mux bindings 

This converts the Nomadik pin controller and all associated device
trees to use the standard, generic mux bindings for pin controllers.
There are no such device trees deployed in the wild so this is
safe to do to set a good example.
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent f114040e
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Inline Side-by-side
Showing with 88 additions and 84 deletions
arch/arm/boot/dts/ste-ccu8540-pinctrl.dtsi
View file @ 68d41f23
...@@ -16,8 +16,8 @@ pinctrl { ...@@ -16,8 +16,8 @@ pinctrl {
uart0 { uart0 {
uart0_default_mux: uart0_mux { uart0_default_mux: uart0_mux {
default_mux { default_mux {
ste,function = "u0"; function = "u0";
ste,pins = "u0_a_1"; groups = "u0_a_1";
}; };
}; };
...@@ -49,8 +49,8 @@ sleep_cfg2 { ...@@ -49,8 +49,8 @@ sleep_cfg2 {
uart2 { uart2 {
uart2_default_mode: uart2_default { uart2_default_mode: uart2_default {
default_mux { default_mux {
ste,function = "u2"; function = "u2";
ste,pins = "u2txrx_a_1"; groups = "u2txrx_a_1";
}; };
default_cfg1 { default_cfg1 {
...@@ -80,8 +80,8 @@ sleep_cfg2 { ...@@ -80,8 +80,8 @@ sleep_cfg2 {
i2c0 { i2c0 {
i2c0_default_mux: i2c_mux { i2c0_default_mux: i2c_mux {
default_mux { default_mux {
ste,function = "i2c0"; function = "i2c0";
ste,pins = "i2c0_a_1"; groups = "i2c0_a_1";
}; };
}; };
...@@ -103,8 +103,8 @@ sleep_cfg1 { ...@@ -103,8 +103,8 @@ sleep_cfg1 {
i2c1 { i2c1 {
i2c1_default_mux: i2c_mux { i2c1_default_mux: i2c_mux {
default_mux { default_mux {
ste,function = "i2c1"; function = "i2c1";
ste,pins = "i2c1_b_2"; groups = "i2c1_b_2";
}; };
}; };
...@@ -126,8 +126,8 @@ sleep_cfg1 { ...@@ -126,8 +126,8 @@ sleep_cfg1 {
i2c2 { i2c2 {
i2c2_default_mux: i2c_mux { i2c2_default_mux: i2c_mux {
default_mux { default_mux {
ste,function = "i2c2"; function = "i2c2";
ste,pins = "i2c2_b_2"; groups = "i2c2_b_2";
}; };
}; };
...@@ -149,8 +149,8 @@ sleep_cfg1 { ...@@ -149,8 +149,8 @@ sleep_cfg1 {
i2c4 { i2c4 {
i2c4_default_mux: i2c_mux { i2c4_default_mux: i2c_mux {
default_mux { default_mux {
ste,function = "i2c4"; function = "i2c4";
ste,pins = "i2c4_b_2"; groups = "i2c4_b_2";
}; };
}; };
...@@ -172,8 +172,8 @@ sleep_cfg1 { ...@@ -172,8 +172,8 @@ sleep_cfg1 {
i2c5 { i2c5 {
i2c5_default_mux: i2c_mux { i2c5_default_mux: i2c_mux {
default_mux { default_mux {
ste,function = "i2c5"; function = "i2c5";
ste,pins = "i2c5_c_2"; groups = "i2c5_c_2";
}; };
}; };
......
arch/arm/boot/dts/ste-href-family-pinctrl.dtsi
View file @ 68d41f23
...@@ -18,8 +18,8 @@ pinctrl { ...@@ -18,8 +18,8 @@ pinctrl {
uart0 { uart0 {
uart0_default_mode: uart0_default { uart0_default_mode: uart0_default {
default_mux { default_mux {
ste,function = "u0"; function = "u0";
ste,pins = "u0_a_1"; groups = "u0_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */ ste,pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
...@@ -53,8 +53,8 @@ sleep_cfg3 { ...@@ -53,8 +53,8 @@ sleep_cfg3 {
uart1 { uart1 {
uart1_default_mode: uart1_default { uart1_default_mode: uart1_default {
default_mux { default_mux {
ste,function = "u1"; function = "u1";
ste,pins = "u1rxtx_a_1"; groups = "u1rxtx_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO4_AH6"; /* RXD */ ste,pins = "GPIO4_AH6"; /* RXD */
...@@ -83,8 +83,8 @@ sleep_cfg2 { ...@@ -83,8 +83,8 @@ sleep_cfg2 {
uart2 { uart2 {
uart2_default_mode: uart2_default { uart2_default_mode: uart2_default {
default_mux { default_mux {
ste,function = "u2"; function = "u2";
ste,pins = "u2rxtx_c_1"; groups = "u2rxtx_c_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO29_W2"; /* RXD */ ste,pins = "GPIO29_W2"; /* RXD */
...@@ -114,8 +114,8 @@ sleep_cfg2 { ...@@ -114,8 +114,8 @@ sleep_cfg2 {
i2c0 { i2c0 {
i2c0_default_mode: i2c_default { i2c0_default_mode: i2c_default {
default_mux { default_mux {
ste,function = "i2c0"; function = "i2c0";
ste,pins = "i2c0_a_1"; groups = "i2c0_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */ ste,pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
...@@ -134,8 +134,8 @@ sleep_cfg1 { ...@@ -134,8 +134,8 @@ sleep_cfg1 {
i2c1 { i2c1 {
i2c1_default_mode: i2c_default { i2c1_default_mode: i2c_default {
default_mux { default_mux {
ste,function = "i2c1"; function = "i2c1";
ste,pins = "i2c1_b_2"; groups = "i2c1_b_2";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */ ste,pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
...@@ -154,8 +154,8 @@ sleep_cfg1 { ...@@ -154,8 +154,8 @@ sleep_cfg1 {
i2c2 { i2c2 {
i2c2_default_mode: i2c_default { i2c2_default_mode: i2c_default {
default_mux { default_mux {
ste,function = "i2c2"; function = "i2c2";
ste,pins = "i2c2_b_2"; groups = "i2c2_b_2";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */ ste,pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
...@@ -174,8 +174,8 @@ sleep_cfg1 { ...@@ -174,8 +174,8 @@ sleep_cfg1 {
i2c3 { i2c3 {
i2c3_default_mode: i2c_default { i2c3_default_mode: i2c_default {
default_mux { default_mux {
ste,function = "i2c3"; function = "i2c3";
ste,pins = "i2c3_c_2"; groups = "i2c3_c_2";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */ ste,pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
...@@ -198,8 +198,8 @@ sleep_cfg1 { ...@@ -198,8 +198,8 @@ sleep_cfg1 {
i2c4 { i2c4 {
i2c4_default_mode: i2c_default { i2c4_default_mode: i2c_default {
default_mux { default_mux {
ste,function = "i2c4"; function = "i2c4";
ste,pins = "i2c4_b_1"; groups = "i2c4_b_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */ ste,pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
...@@ -219,8 +219,8 @@ sleep_cfg1 { ...@@ -219,8 +219,8 @@ sleep_cfg1 {
spi2 { spi2 {
spi2_default_mode: spi_default { spi2_default_mode: spi_default {
default_mux { default_mux {
ste,function = "spi2"; function = "spi2";
ste,pins = "spi2_oc1_2"; groups = "spi2_oc1_2";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO216_AG12"; /* FRM */ ste,pins = "GPIO216_AG12"; /* FRM */
...@@ -281,8 +281,8 @@ sdi0 { ...@@ -281,8 +281,8 @@ sdi0 {
/* This is the external SD card slot, 4 bits wide */ /* This is the external SD card slot, 4 bits wide */
sdi0_default_mode: sdi0_default { sdi0_default_mode: sdi0_default {
default_mux { default_mux {
ste,function = "mc0"; function = "mc0";
ste,pins = "mc0_a_1"; groups = "mc0_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = ste,pins =
...@@ -339,8 +339,8 @@ sdi1 { ...@@ -339,8 +339,8 @@ sdi1 {
/* This is the WLAN SDIO 4 bits wide */ /* This is the WLAN SDIO 4 bits wide */
sdi1_default_mode: sdi1_default { sdi1_default_mode: sdi1_default {
default_mux { default_mux {
ste,function = "mc1"; function = "mc1";
ste,pins = "mc1_a_1"; groups = "mc1_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO208_AH16"; /* CLK */ ste,pins = "GPIO208_AH16"; /* CLK */
...@@ -383,8 +383,8 @@ sdi2 { ...@@ -383,8 +383,8 @@ sdi2 {
/* This is the eMMC 8 bits wide, usually PoP eMMC */ /* This is the eMMC 8 bits wide, usually PoP eMMC */
sdi2_default_mode: sdi2_default { sdi2_default_mode: sdi2_default {
default_mux { default_mux {
ste,function = "mc2"; function = "mc2";
ste,pins = "mc2_a_1"; groups = "mc2_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO128_A5"; /* CLK */ ste,pins = "GPIO128_A5"; /* CLK */
...@@ -439,8 +439,8 @@ sdi4 { ...@@ -439,8 +439,8 @@ sdi4 {
/* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */ /* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
sdi4_default_mode: sdi4_default { sdi4_default_mode: sdi4_default {
default_mux { default_mux {
ste,function = "mc4"; function = "mc4";
ste,pins = "mc4_a_1"; groups = "mc4_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO203_AE23"; /* CLK */ ste,pins = "GPIO203_AE23"; /* CLK */
...@@ -494,8 +494,8 @@ sleep_cfg2 { ...@@ -494,8 +494,8 @@ sleep_cfg2 {
msp0 { msp0 {
msp0_default_mode: msp0_default { msp0_default_mode: msp0_default {
default_msp0_mux { default_msp0_mux {
ste,function = "msp0"; function = "msp0";
ste,pins = "msp0txrx_a_1", "msp0tfstck_a_1"; groups = "msp0txrx_a_1", "msp0tfstck_a_1";
}; };
default_msp0_cfg { default_msp0_cfg {
ste,pins = ste,pins =
...@@ -511,8 +511,8 @@ default_msp0_cfg { ...@@ -511,8 +511,8 @@ default_msp0_cfg {
msp1 { msp1 {
msp1_default_mode: msp1_default { msp1_default_mode: msp1_default {
default_mux { default_mux {
ste,function = "msp1"; function = "msp1";
ste,pins = "msp1txrx_a_1", "msp1_a_1"; groups = "msp1txrx_a_1", "msp1_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = "GPIO33_AF2"; ste,pins = "GPIO33_AF2";
...@@ -533,8 +533,8 @@ msp2 { ...@@ -533,8 +533,8 @@ msp2 {
msp2_default_mode: msp2_default { msp2_default_mode: msp2_default {
/* MSP2 usually used for HDMI audio */ /* MSP2 usually used for HDMI audio */
default_mux { default_mux {
ste,function = "msp2"; function = "msp2";
ste,pins = "msp2_a_1"; groups = "msp2_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = ste,pins =
...@@ -554,8 +554,8 @@ default_cfg2 { ...@@ -554,8 +554,8 @@ default_cfg2 {
musb { musb {
musb_default_mode: musb_default { musb_default_mode: musb_default {
default_mux { default_mux {
ste,function = "usb"; function = "usb";
ste,pins = "usb_a_1"; groups = "usb_a_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = ste,pins =
...@@ -609,8 +609,8 @@ mcde { ...@@ -609,8 +609,8 @@ mcde {
lcd_default_mode: lcd_default { lcd_default_mode: lcd_default {
default_mux { default_mux {
/* Mux in VSI0 and all the data lines */ /* Mux in VSI0 and all the data lines */
ste,function = "lcd"; function = "lcd";
ste,pins = groups =
"lcdvsi0_a_1", /* VSI0 for LCD */ "lcdvsi0_a_1", /* VSI0 for LCD */
"lcd_d0_d7_a_1", /* Data lines */ "lcd_d0_d7_a_1", /* Data lines */
"lcd_d8_d11_a_1", /* TV-out */ "lcd_d8_d11_a_1", /* TV-out */
...@@ -636,8 +636,8 @@ ske { ...@@ -636,8 +636,8 @@ ske {
/* SKE keys on position 2 in an 8x8 matrix */ /* SKE keys on position 2 in an 8x8 matrix */
ske_kpa2_default_mode: ske_kpa2_default { ske_kpa2_default_mode: ske_kpa2_default {
default_mux { default_mux {
ste,function = "kp"; function = "kp";
ste,pins = "kp_a_2"; groups = "kp_a_2";
}; };
default_cfg1 { default_cfg1 {
ste,pins = ste,pins =
...@@ -696,8 +696,8 @@ sleep_cfg2 { ...@@ -696,8 +696,8 @@ sleep_cfg2 {
*/ */
ske_kpaoc1_default_mode: ske_kpaoc1_default { ske_kpaoc1_default_mode: ske_kpaoc1_default {
default_mux { default_mux {
ste,function = "kp"; function = "kp";
ste,pins = "kp_a_1", "kp_oc1_1"; groups = "kp_a_1", "kp_oc1_1";
}; };
default_cfg1 { default_cfg1 {
ste,pins = ste,pins =
......
arch/arm/boot/dts/ste-hrefprev60.dtsi
View file @ 68d41f23
...@@ -79,8 +79,8 @@ pinctrl { ...@@ -79,8 +79,8 @@ pinctrl {
ssp0 { ssp0 {
ssp0_hrefprev60_mode: ssp0_hrefprev60_default { ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
hrefprev60_mux { hrefprev60_mux {
ste,function = "ssp0"; function = "ssp0";
ste,pins = "ssp0_a_1"; groups = "ssp0_a_1";
}; };
hrefprev60_cfg1 { hrefprev60_cfg1 {
ste,pins = "GPIO145_C13"; /* RXD */ ste,pins = "GPIO145_C13"; /* RXD */
...@@ -93,8 +93,8 @@ sdi0 { ...@@ -93,8 +93,8 @@ sdi0 {
/* This additional pin needed on early MOP500 and HREFs previous to v60 */ /* This additional pin needed on early MOP500 and HREFs previous to v60 */
sdi0_default_mode: sdi0_default { sdi0_default_mode: sdi0_default {
hrefprev60_mux { hrefprev60_mux {
ste,function = "mc0"; function = "mc0";
ste,pins = "mc0dat31dir_a_1"; groups = "mc0dat31dir_a_1";
}; };
hrefprev60_cfg1 { hrefprev60_cfg1 {
ste,pins = "GPIO21_AB3"; /* DAT31DIR */ ste,pins = "GPIO21_AB3"; /* DAT31DIR */
...@@ -114,8 +114,8 @@ hrefprev60_cfg { ...@@ -114,8 +114,8 @@ hrefprev60_cfg {
ipgpio { ipgpio {
ipgpio_hrefprev60_mode: ipgpio_hrefprev60 { ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
hrefprev60_mux { hrefprev60_mux {
ste,function = "ipgpio"; function = "ipgpio";
ste,pins = "ipgpio0_c_1", "ipgpio1_c_1"; groups = "ipgpio0_c_1", "ipgpio1_c_1";
}; };
hrefprev60_cfg1 { hrefprev60_cfg1 {
ste,pins = "GPIO6_AF6", "GPIO7_AG5"; ste,pins = "GPIO6_AF6", "GPIO7_AG5";
......
arch/arm/boot/dts/ste-hrefv60plus.dtsi
View file @ 68d41f23
...@@ -64,8 +64,8 @@ ipgpio { ...@@ -64,8 +64,8 @@ ipgpio {
*/ */
ipgpio_hrefv60_mode: ipgpio_hrefv60 { ipgpio_hrefv60_mode: ipgpio_hrefv60 {
hrefv60_mux { hrefv60_mux {
ste,function = "ipgpio"; function = "ipgpio";
ste,pins = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1"; groups = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
}; };
hrefv60_cfg1 { hrefv60_cfg1 {
ste,pins = "GPIO6_AF6", "GPIO7_AG5"; ste,pins = "GPIO6_AF6", "GPIO7_AG5";
......
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
View file @ 68d41f23
...@@ -100,24 +100,24 @@ pinctrl { ...@@ -100,24 +100,24 @@ pinctrl {
uart0 { uart0 {
uart0_default_mux: uart0_mux { uart0_default_mux: uart0_mux {
u0_default_mux { u0_default_mux {
ste,function = "u0"; function = "u0";
ste,pins = "u0_a_1"; groups = "u0_a_1";
}; };
}; };
}; };
uart1 { uart1 {
uart1_default_mux: uart1_mux { uart1_default_mux: uart1_mux {
u1_default_mux { u1_default_mux {
ste,function = "u1"; function = "u1";
ste,pins = "u1_a_1"; groups = "u1_a_1";
}; };
}; };
}; };
mmcsd { mmcsd {
mmcsd_default_mux: mmcsd_mux { mmcsd_default_mux: mmcsd_mux {
mmcsd_default_mux { mmcsd_default_mux {
ste,function = "mmcsd"; function = "mmcsd";
ste,pins = "mmcsd_a_1"; groups = "mmcsd_a_1";
}; };
}; };
mmcsd_default_mode: mmcsd_default { mmcsd_default_mode: mmcsd_default {
...@@ -144,8 +144,8 @@ mmcsd_default_cfg3 { ...@@ -144,8 +144,8 @@ mmcsd_default_cfg3 {
i2c0 { i2c0 {
i2c0_default_mux: i2c0_mux { i2c0_default_mux: i2c0_mux {
i2c0_default_mux { i2c0_default_mux {
ste,function = "i2c0"; function = "i2c0";
ste,pins = "i2c0_a_1"; groups = "i2c0_a_1";
}; };
}; };
i2c0_default_mode: i2c0_default { i2c0_default_mode: i2c0_default {
...@@ -158,8 +158,8 @@ i2c0_default_cfg { ...@@ -158,8 +158,8 @@ i2c0_default_cfg {
i2c1 { i2c1 {
i2c1_default_mux: i2c1_mux { i2c1_default_mux: i2c1_mux {
i2c1_default_mux { i2c1_default_mux {
ste,function = "i2c1"; function = "i2c1";
ste,pins = "i2c1_a_1"; groups = "i2c1_a_1";
}; };
}; };
i2c1_default_mode: i2c1_default { i2c1_default_mode: i2c1_default {
......
arch/arm/boot/dts/ste-snowball.dts
View file @ 68d41f23
...@@ -404,8 +404,8 @@ ethernet { ...@@ -404,8 +404,8 @@ ethernet {
*/ */
eth_snowball_mode: eth_snowball { eth_snowball_mode: eth_snowball {
snowball_mux { snowball_mux {
ste,function = "sm"; function = "sm";
ste,pins = "sm_b_1"; groups = "sm_b_1";
}; };
/* LAN IRQ pin */ /* LAN IRQ pin */
snowball_cfg1 { snowball_cfg1 {
...@@ -423,8 +423,8 @@ snowball_cfg2 { ...@@ -423,8 +423,8 @@ snowball_cfg2 {
sdi0 { sdi0 {
sdi0_default_mode: sdi0_default { sdi0_default_mode: sdi0_default {
snowball_mux { snowball_mux {
ste,function = "mc0"; function = "mc0";
ste,pins = "mc0dat31dir_a_1"; groups = "mc0dat31dir_a_1";
}; };
snowball_cfg1 { snowball_cfg1 {
ste,pins = "GPIO21_AB3"; /* DAT31DIR */ ste,pins = "GPIO21_AB3"; /* DAT31DIR */
...@@ -436,8 +436,8 @@ snowball_cfg1 { ...@@ -436,8 +436,8 @@ snowball_cfg1 {
ssp0 { ssp0 {
ssp0_snowball_mode: ssp0_snowball_default { ssp0_snowball_mode: ssp0_snowball_default {
snowball_mux { snowball_mux {
ste,function = "ssp0"; function = "ssp0";
ste,pins = "ssp0_a_1"; groups = "ssp0_a_1";
}; };
snowball_cfg1 { snowball_cfg1 {
ste,pins = "GPIO144_B13"; /* FRM */ ste,pins = "GPIO144_B13"; /* FRM */
......
drivers/pinctrl/nomadik/pinctrl-nomadik.c
View file @ 68d41f23
...@@ -1520,12 +1520,13 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, ...@@ -1520,12 +1520,13 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
unsigned long configs = 0; unsigned long configs = 0;
bool has_config = 0; bool has_config = 0;
struct property *prop; struct property *prop;
const char *group, *gpio_name;
struct device_node *np_config; struct device_node *np_config;
ret = of_property_read_string(np, "ste,function", &function); ret = of_property_read_string(np, "function", &function);
if (ret >= 0) { if (ret >= 0) {
ret = of_property_count_strings(np, "ste,pins"); const char *group;
ret = of_property_count_strings(np, "groups");
if (ret < 0) if (ret < 0)
goto exit; goto exit;
...@@ -1535,7 +1536,7 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, ...@@ -1535,7 +1536,7 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
if (ret < 0) if (ret < 0)
goto exit; goto exit;
of_property_for_each_string(np, "ste,pins", prop, group) { of_property_for_each_string(np, "groups", prop, group) {
ret = nmk_dt_add_map_mux(map, reserved_maps, num_maps, ret = nmk_dt_add_map_mux(map, reserved_maps, num_maps,
group, function); group, function);
if (ret < 0) if (ret < 0)
...@@ -1548,6 +1549,9 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, ...@@ -1548,6 +1549,9 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
if (np_config) if (np_config)
has_config |= nmk_pinctrl_dt_get_config(np_config, &configs); has_config |= nmk_pinctrl_dt_get_config(np_config, &configs);
if (has_config) { if (has_config) {
const char *gpio_name;
const char *pin;
ret = of_property_count_strings(np, "ste,pins"); ret = of_property_count_strings(np, "ste,pins");
if (ret < 0) if (ret < 0)
goto exit; goto exit;
...@@ -1557,8 +1561,8 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, ...@@ -1557,8 +1561,8 @@ static int nmk_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
if (ret < 0) if (ret < 0)
goto exit; goto exit;
of_property_for_each_string(np, "ste,pins", prop, group) { of_property_for_each_string(np, "ste,pins", prop, pin) {
gpio_name = nmk_find_pin_name(pctldev, group); gpio_name = nmk_find_pin_name(pctldev, pin);
ret = nmk_dt_add_map_configs(map, reserved_maps, ret = nmk_dt_add_map_configs(map, reserved_maps,
num_maps, num_maps,
......
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