Commit 6929d1d7 authored by Felix Fietkau's avatar Felix Fietkau

mt76: flush tx status queue on DMA reset

After DMA reset, tx status information for queued frames will never arrive.
Flush the queue to free skbs immediately instead of waiting for a timeout
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 2b9ea5a8
......@@ -1445,6 +1445,8 @@ static void mt7603_mac_watchdog_reset(struct mt7603_dev *dev)
mt76_queue_rx_reset(dev, i);
}
mt76_tx_status_check(&dev->mt76, NULL, true);
mt7603_dma_sched_reset(dev);
mt7603_mac_dma_start(dev);
......
......@@ -201,6 +201,8 @@ void mt7615_dma_reset(struct mt7615_dev *dev)
mt76_for_each_q_rx(&dev->mt76, i)
mt76_queue_rx_reset(dev, i);
mt76_tx_status_check(&dev->mt76, NULL, true);
mt7615_dma_start(dev);
}
EXPORT_SYMBOL_GPL(mt7615_dma_reset);
......
......@@ -472,6 +472,8 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev)
mt76_queue_rx_reset(dev, i);
}
mt76_tx_status_check(&dev->mt76, NULL, true);
mt76x02_mac_start(dev);
if (dev->ed_monitor)
......
......@@ -1564,6 +1564,8 @@ mt7915_dma_reset(struct mt7915_dev *dev)
mt76_for_each_q_rx(&dev->mt76, i)
mt76_queue_rx_reset(dev, i);
mt76_tx_status_check(&dev->mt76, NULL, true);
/* re-init prefetch settings after reset */
mt7915_dma_prefetch(dev);
......
......@@ -1254,6 +1254,8 @@ mt7921_dma_reset(struct mt7921_dev *dev)
mt76_for_each_q_rx(&dev->mt76, i)
mt76_queue_reset(dev, &dev->mt76.q_rx[i]);
mt76_tx_status_check(&dev->mt76, NULL, true);
/* configure perfetch settings */
mt7921_dma_prefetch(dev);
......
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