Commit 6937dbff authored by Olof Johansson's avatar Olof Johansson

Merge tag 'omap-for-v3.20/dt-pt1' of...

Merge tag 'omap-for-v3.20/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Merge "omap device tree changes for v3.20" from Tony Lindgren:

Device tree changes for omaps. Mostly to add support for new
am437x-idk and update am437x-sk boards. Also enabling new
devices for multiple boards.

* tag 'omap-for-v3.20/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
  ARM: dts: omap3-gta04: Add handling for tv output
  ARM: dts: cm-t3x: add NAND support
  ARM: dts: am57xx-beagle-x15: Add GPIO controlled fan node
  ARM: dts: am437x-idk: add gpio-based power key
  ARM: dts: N950/N9: add twl_power
  ARM: dts: am437x-sk: add power button binding
  ARM: dts: add support for AM437x IDK
  ARM: dts: am437x-gp-evm: add VPFE device tree data
  ARM: dts: am437x-sk-evm: add VPFE device tree data
  ARM: dts: am43x-epos-evm: add VPFE device tree data
  ARM: dts: am4372: add VPFE DT node entries
  ARM: dts: DRA7X: drop id property in pcie_phy
  ARM: dts: omap3-n900: cleanup english
  ARM: dts: am57xx-beagle-x15: Add dual ethernet
  ARM: dts: am437x-sk: remove DSS pulls
  ARM: dts: am437x-sk: remove internal i2c pullups
  ARM: dts: am437x-sk: add explicit pinmux for both USB instances
  ARM: dts: am437x-sk: remove ethernet pulls
  ARM: dts: am437x-sk: add explicit MMC0 pinmux
  ARM: dts: am437x-sk: remove internal pulls from QSPI
  ...
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents a315ec7b 7300bfff
......@@ -414,6 +414,7 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
dtb-$(CONFIG_SOC_AM43XX) += \
am43x-epos-evm.dtb \
am437x-sk-evm.dtb \
am437x-idk-evm.dtb \
am437x-gp-evm.dtb
dtb-$(CONFIG_SOC_OMAP5) += \
omap5-cm-t54.dtb \
......
......@@ -948,6 +948,22 @@ dcan1: can@481d0000 {
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
vpfe0: vpfe@48326000 {
compatible = "ti,am437x-vpfe";
reg = <0x48326000 0x2000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "vpfe0";
status = "disabled";
};
vpfe1: vpfe@48328000 {
compatible = "ti,am437x-vpfe";
reg = <0x48328000 0x2000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "vpfe1";
status = "disabled";
};
};
};
......
......@@ -268,6 +268,78 @@ dcan1_default: dcan1_default_pins {
0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
>;
};
vpfe0_pins_default: vpfe0_pins_default {
pinctrl-single,pins = <
0x1B0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
0x1B4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
0x1C0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
0x1C4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
0x1C8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
0x20C (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
0x21C (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
>;
};
vpfe0_pins_sleep: vpfe0_pins_sleep {
pinctrl-single,pins = <
0x1B0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_hd mode 0*/
0x1B4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_vd mode 0*/
0x1C0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_pclk mode 0*/
0x1C4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data8 mode 0*/
0x1C8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data9 mode 0*/
0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data0 mode 0*/
0x20C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data1 mode 0*/
0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data2 mode 0*/
0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data3 mode 0*/
0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data4 mode 0*/
0x21C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data5 mode 0*/
0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data6 mode 0*/
0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data7 mode 0*/
>;
};
vpfe1_pins_default: vpfe1_pins_default {
pinctrl-single,pins = <
0x1CC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0*/
0x1D0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0*/
0x1D4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0*/
0x1D8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0*/
0x1DC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0*/
0x1E8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0*/
0x1EC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0*/
0x1F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0*/
0x1F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0*/
0x1F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0*/
0x1FC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0*/
0x200 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0*/
0x204 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0*/
>;
};
vpfe1_pins_sleep: vpfe1_pins_sleep {
pinctrl-single,pins = <
0x1CC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data9 mode 0*/
0x1D0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data8 mode 0*/
0x1D4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_hd mode 0*/
0x1D8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_vd mode 0*/
0x1DC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_pclk mode 0*/
0x1E8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data0 mode 0*/
0x1EC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data1 mode 0*/
0x1F0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data2 mode 0*/
0x1F4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data3 mode 0*/
0x1F8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data4 mode 0*/
0x1FC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data5 mode 0*/
0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data6 mode 0*/
0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data7 mode 0*/
>;
};
};
&i2c0 {
......@@ -545,3 +617,37 @@ &dcan1 {
pinctrl-0 = <&dcan1_default>;
status = "okay";
};
&vpfe0 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&vpfe0_pins_default>;
pinctrl-1 = <&vpfe0_pins_sleep>;
port {
vpfe0_ep: endpoint {
/* remote-endpoint = <&sensor>; add once we have it */
ti,am437x-vpfe-interface = <0>;
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
&vpfe1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&vpfe1_pins_default>;
pinctrl-1 = <&vpfe1_pins_sleep>;
port {
vpfe1_ep: endpoint {
/* remote-endpoint = <&sensor>; add once we have it */
ti,am437x-vpfe-interface = <0>;
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
This diff is collapsed.
This diff is collapsed.
......@@ -243,6 +243,42 @@ lcd_pins: lcd_pins {
0x08C (PIN_OUTPUT_PULLUP | MUX_MODE7)
>;
};
vpfe1_pins_default: vpfe1_pins_default {
pinctrl-single,pins = <
0x1cc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0 */
0x1d0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0 */
0x1d4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0 */
0x1d8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0 */
0x1dc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0 */
0x1e8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0 */
0x1ec (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0 */
0x1f0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0 */
0x1f4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0 */
0x1f8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0 */
0x1fc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0 */
0x200 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0 */
0x204 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0 */
>;
};
vpfe1_pins_sleep: vpfe1_pins_sleep {
pinctrl-single,pins = <
0x1cc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1d0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1d4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1d8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1dc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1e8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1ec (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1f0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1f4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1f8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x1fc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
>;
};
};
matrix_keypad: matrix_keypad@0 {
......@@ -634,3 +670,20 @@ dpi_out: endpoint@0 {
};
};
};
&vpfe1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&vpfe1_pins_default>;
pinctrl-1 = <&vpfe1_pins_sleep>;
port {
vpfe1_ep: endpoint {
/* remote-endpoint = <&sensor>; add once we have it */
ti,am437x-vpfe-interface = <0>;
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
......@@ -80,6 +80,14 @@ led@3 {
default-state = "off";
};
};
gpio_fan: gpio_fan {
/* Based on 5v 500mA AFB02505HHB */
compatible = "gpio-fan";
gpios = <&tps659038_gpio 1 GPIO_ACTIVE_HIGH>;
gpio-fan,speed-map = <0 0>,
<13000 1>;
};
};
&dra7_pmx_core {
......@@ -140,6 +148,86 @@ mmc2_pins_default: mmc2_pins_default {
>;
};
cpsw_pins_default: cpsw_pins_default {
pinctrl-single,pins = <
/* Slave 1 */
0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
/* Slave 2 */
0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
>;
};
cpsw_pins_sleep: cpsw_pins_sleep {
pinctrl-single,pins = <
/* Slave 1 */
0x250 (PIN_INPUT | MUX_MODE15)
0x254 (PIN_INPUT | MUX_MODE15)
0x258 (PIN_INPUT | MUX_MODE15)
0x25c (PIN_INPUT | MUX_MODE15)
0x260 (PIN_INPUT | MUX_MODE15)
0x264 (PIN_INPUT | MUX_MODE15)
0x268 (PIN_INPUT | MUX_MODE15)
0x26c (PIN_INPUT | MUX_MODE15)
0x270 (PIN_INPUT | MUX_MODE15)
0x274 (PIN_INPUT | MUX_MODE15)
0x278 (PIN_INPUT | MUX_MODE15)
0x27c (PIN_INPUT | MUX_MODE15)
/* Slave 2 */
0x198 (PIN_INPUT | MUX_MODE15)
0x19c (PIN_INPUT | MUX_MODE15)
0x1a0 (PIN_INPUT | MUX_MODE15)
0x1a4 (PIN_INPUT | MUX_MODE15)
0x1a8 (PIN_INPUT | MUX_MODE15)
0x1ac (PIN_INPUT | MUX_MODE15)
0x1b0 (PIN_INPUT | MUX_MODE15)
0x1b4 (PIN_INPUT | MUX_MODE15)
0x1b8 (PIN_INPUT | MUX_MODE15)
0x1bc (PIN_INPUT | MUX_MODE15)
0x1c0 (PIN_INPUT | MUX_MODE15)
0x1c4 (PIN_INPUT | MUX_MODE15)
>;
};
davinci_mdio_pins_default: davinci_mdio_pins_default {
pinctrl-single,pins = <
/* MDIO */
0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
>;
};
davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
pinctrl-single,pins = <
0x23c (PIN_INPUT | MUX_MODE15)
0x240 (PIN_INPUT | MUX_MODE15)
>;
};
tps659038_pins_default: tps659038_pins_default {
pinctrl-single,pins = <
0x418 (PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
......@@ -314,6 +402,12 @@ tps659038_pwr_button: tps659038_pwr_button {
wakeup-source;
ti,palmas-long-press-seconds = <12>;
};
tps659038_gpio: tps659038_gpio {
compatible = "ti,palmas-gpio";
gpio-controller;
#gpio-cells = <2>;
};
};
tmp102: tmp102@48 {
......@@ -365,6 +459,32 @@ &uart3 {
pinctrl-0 = <&uart3_pins_default>;
};
&mac {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_pins_default>;
pinctrl-1 = <&cpsw_pins_sleep>;
dual_emac;
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <2>;
phy-mode = "rgmii";
dual_emac_res_vlan = <2>;
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_pins_default>;
pinctrl-1 = <&davinci_mdio_pins_sleep>;
};
&mmc1 {
status = "okay";
......
......@@ -1111,7 +1111,6 @@ pcie1_phy: pciephy@4a094000 {
"wkupclk", "refclk",
"div-clk", "phy-div";
#phy-cells = <0>;
id = <1>;
ti,hwmods = "pcie1-phy";
};
......@@ -1132,7 +1131,6 @@ pcie2_phy: pciephy@4a095000 {
"div-clk", "phy-div";
#phy-cells = <0>;
ti,hwmods = "pcie2-phy";
id = <2>;
status = "disabled";
};
};
......
......@@ -259,3 +259,61 @@ &mcbsp2 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp2_pins>;
};
&gpmc {
ranges = <0 0 0x00000000 0x01000000>;
nand@0,0 {
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <8>;
gpmc,device-width = <1>;
ti,nand-ecc-opt = "sw";
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <120>;
gpmc,cs-wr-off-ns = <120>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <120>;
gpmc,adv-wr-off-ns = <120>;
gpmc,we-on-ns = <6>;
gpmc,we-off-ns = <90>;
gpmc,oe-on-ns = <6>;
gpmc,oe-off-ns = <90>;
gpmc,page-burst-access-ns = <6>;
gpmc,access-ns = <72>;
gpmc,cycle2cycle-delay-ns = <60>;
gpmc,rd-cycle-ns = <120>;
gpmc,wr-cycle-ns = <120>;
gpmc,wr-access-ns = <186>;
gpmc,wr-data-mux-bus-ns = <90>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "xloader";
reg = <0 0x80000>;
};
partition@0x80000 {
label = "uboot";
reg = <0x80000 0x1e0000>;
};
partition@0x260000 {
label = "uboot environment";
reg = <0x260000 0x40000>;
};
partition@0x2a0000 {
label = "linux";
reg = <0x2a0000 0x400000>;
};
partition@0x6a0000 {
label = "rootfs";
reg = <0x6a0000 0x1f880000>;
};
};
};
......@@ -50,7 +50,8 @@ OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0
#include "omap-gpmc-smsc911x.dtsi"
&gpmc {
ranges = <5 0 0x2c000000 0x01000000>;
ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
<0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
smsc1: ethernet@gpmc {
compatible = "smsc,lan9221", "smsc,lan9115";
......
......@@ -83,6 +83,41 @@ hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
};
tv0: connector@1 {
compatible = "svideo-connector";
label = "tv";
port {
tv_connector_in: endpoint {
remote-endpoint = <&opa_out>;
};
};
};
tv_amp: opa362 {
compatible = "ti,opa362";
enable-gpios = <&gpio1 23 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
opa_in: endpoint@0 {
remote-endpoint = <&venc_out>;
};
};
port@1 {
reg = <1>;
opa_out: endpoint@0 {
remote-endpoint = <&tv_connector_in>;
};
};
};
};
};
&omap3_pmx_core {
......@@ -396,6 +431,20 @@ dpi_out: endpoint {
};
};
&venc {
status = "okay";
vdda-supply = <&vdac>;
port {
venc_out: endpoint {
remote-endpoint = <&opa_in>;
ti,channels = <2>;
ti,invert-polarity;
};
};
};
&gpmc {
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
......
......@@ -307,7 +307,7 @@ &vaux1 {
regulator-name = "V28";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on; /* due battery cover sensor */
regulator-always-on; /* due to battery cover sensor */
};
&vaux2 {
......@@ -365,7 +365,6 @@ &vio {
regulator-name = "VIO";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
&vintana1 {
......
......@@ -60,6 +60,11 @@ twl: twl@48 {
&twl {
compatible = "ti,twl5031";
twl_power: power {
compatible = "ti,twl4030-power";
ti,use_poweroff;
};
};
&twl_gpio {
......
......@@ -69,3 +69,7 @@ dpi_out: endpoint {
};
};
&gpmc {
ranges = <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
<0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
};
......@@ -26,14 +26,10 @@ OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35
};
};
/*
* The following ranges correspond to SMSC9x eth chips on CM-T3530 CoM and
* SB-T35 baseboard respectively.
* This setting includes both chips in SBC-T3530 board device tree.
*/
&gpmc {
ranges = <5 0 0x2c000000 0x01000000>,
<4 0 0x2d000000 0x01000000>;
ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
<4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
<0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
};
&mmc1 {
......
......@@ -27,8 +27,9 @@ OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35
};
&gpmc {
ranges = <5 0 0x2c000000 0x01000000>,
<4 0 0x2d000000 0x01000000>;
ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
<4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
<0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
};
&dss {
......
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