Commit 6a4b02b8 authored by Petr Machata's avatar Petr Machata Committed by Jakub Kicinski

mlxsw: Revert "Introduce initial XM router support"

This reverts commit 75c2a8fe ("Merge branch
'mlxsw-introduce-initial-xm-router-support'").
Signed-off-by: default avatarPetr Machata <petrm@nvidia.com>
Signed-off-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 6ac6dc74
...@@ -12,7 +12,6 @@ mlxsw_i2c-objs := i2c.o ...@@ -12,7 +12,6 @@ mlxsw_i2c-objs := i2c.o
obj-$(CONFIG_MLXSW_SPECTRUM) += mlxsw_spectrum.o obj-$(CONFIG_MLXSW_SPECTRUM) += mlxsw_spectrum.o
mlxsw_spectrum-objs := spectrum.o spectrum_buffers.o \ mlxsw_spectrum-objs := spectrum.o spectrum_buffers.o \
spectrum_switchdev.o spectrum_router.o \ spectrum_switchdev.o spectrum_router.o \
spectrum_router_xm.o \
spectrum1_kvdl.o spectrum2_kvdl.o \ spectrum1_kvdl.o spectrum2_kvdl.o \
spectrum_kvdl.o \ spectrum_kvdl.o \
spectrum_acl_tcam.o spectrum_acl_ctcam.o \ spectrum_acl_tcam.o spectrum_acl_ctcam.o \
......
...@@ -343,23 +343,6 @@ static inline int mlxsw_cmd_boardinfo(struct mlxsw_core *mlxsw_core, ...@@ -343,23 +343,6 @@ static inline int mlxsw_cmd_boardinfo(struct mlxsw_core *mlxsw_core,
0, 0, false, out_mbox, MLXSW_CMD_MBOX_SIZE); 0, 0, false, out_mbox, MLXSW_CMD_MBOX_SIZE);
} }
/* cmd_mbox_xm_num_local_ports
* Number of local_ports connected to the xm.
* Each local port is a 4x
* Spectrum-2/3: 25G
* Spectrum-4: 50G
*/
MLXSW_ITEM32(cmd_mbox, boardinfo, xm_num_local_ports, 0x00, 4, 3);
/* cmd_mbox_xm_exists
* An XM (eXtanded Mezanine, e.g. used for the XLT) is connected on the board.
*/
MLXSW_ITEM32(cmd_mbox, boardinfo, xm_exists, 0x00, 0, 1);
/* cmd_mbox_xm_local_port_entry
*/
MLXSW_ITEM_BIT_ARRAY(cmd_mbox, boardinfo, xm_local_port_entry, 0x04, 4, 8);
/* cmd_mbox_boardinfo_intapin /* cmd_mbox_boardinfo_intapin
* When PCIe interrupt messages are being used, this value is used for clearing * When PCIe interrupt messages are being used, this value is used for clearing
* an interrupt. When using MSI-X, this register is not used. * an interrupt. When using MSI-X, this register is not used.
...@@ -674,12 +657,6 @@ MLXSW_ITEM32(cmd_mbox, config_profile, set_kvd_hash_double_size, 0x0C, 26, 1); ...@@ -674,12 +657,6 @@ MLXSW_ITEM32(cmd_mbox, config_profile, set_kvd_hash_double_size, 0x0C, 26, 1);
*/ */
MLXSW_ITEM32(cmd_mbox, config_profile, set_cqe_version, 0x08, 0, 1); MLXSW_ITEM32(cmd_mbox, config_profile, set_cqe_version, 0x08, 0, 1);
/* cmd_mbox_config_set_kvh_xlt_cache_mode
* Capability bit. Setting a bit to 1 configures the profile
* according to the mailbox contents.
*/
MLXSW_ITEM32(cmd_mbox, config_profile, set_kvh_xlt_cache_mode, 0x08, 3, 1);
/* cmd_mbox_config_profile_max_vepa_channels /* cmd_mbox_config_profile_max_vepa_channels
* Maximum number of VEPA channels per port (0 through 16) * Maximum number of VEPA channels per port (0 through 16)
* 0 - multi-channel VEPA is disabled * 0 - multi-channel VEPA is disabled
...@@ -806,13 +783,6 @@ MLXSW_ITEM32(cmd_mbox, config_profile, adaptive_routing_group_cap, 0x4C, 0, 16); ...@@ -806,13 +783,6 @@ MLXSW_ITEM32(cmd_mbox, config_profile, adaptive_routing_group_cap, 0x4C, 0, 16);
*/ */
MLXSW_ITEM32(cmd_mbox, config_profile, arn, 0x50, 31, 1); MLXSW_ITEM32(cmd_mbox, config_profile, arn, 0x50, 31, 1);
/* cmd_mbox_config_profile_kvh_xlt_cache_mode
* KVH XLT cache mode:
* 0 - XLT can use all KVH as best-effort
* 1 - XLT cache uses 1/2 KVH
*/
MLXSW_ITEM32(cmd_mbox, config_profile, kvh_xlt_cache_mode, 0x50, 8, 4);
/* cmd_mbox_config_kvd_linear_size /* cmd_mbox_config_kvd_linear_size
* KVD Linear Size * KVD Linear Size
* Valid for Spectrum only * Valid for Spectrum only
......
...@@ -3151,18 +3151,6 @@ mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core, ...@@ -3151,18 +3151,6 @@ mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core,
return mlxsw_core_port->linecard; return mlxsw_core_port->linecard;
} }
bool mlxsw_core_port_is_xm(const struct mlxsw_core *mlxsw_core, u16 local_port)
{
const struct mlxsw_bus_info *bus_info = mlxsw_core->bus_info;
int i;
for (i = 0; i < bus_info->xm_local_ports_count; i++)
if (bus_info->xm_local_ports[i] == local_port)
return true;
return false;
}
EXPORT_SYMBOL(mlxsw_core_port_is_xm);
void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core, void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core,
bool (*selector)(void *priv, u16 local_port), bool (*selector)(void *priv, u16 local_port),
void *priv) void *priv)
......
...@@ -261,7 +261,6 @@ mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, ...@@ -261,7 +261,6 @@ mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
struct mlxsw_linecard * struct mlxsw_linecard *
mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core, mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core,
u16 local_port); u16 local_port);
bool mlxsw_core_port_is_xm(const struct mlxsw_core *mlxsw_core, u16 local_port);
void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core, void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core,
bool (*selector)(void *priv, bool (*selector)(void *priv,
u16 local_port), u16 local_port),
...@@ -296,8 +295,7 @@ struct mlxsw_config_profile { ...@@ -296,8 +295,7 @@ struct mlxsw_config_profile {
used_max_pkey:1, used_max_pkey:1,
used_ar_sec:1, used_ar_sec:1,
used_adaptive_routing_group_cap:1, used_adaptive_routing_group_cap:1,
used_kvd_sizes:1, used_kvd_sizes:1;
used_kvh_xlt_cache_mode:1;
u8 max_vepa_channels; u8 max_vepa_channels;
u16 max_mid; u16 max_mid;
u16 max_pgt; u16 max_pgt;
...@@ -319,7 +317,6 @@ struct mlxsw_config_profile { ...@@ -319,7 +317,6 @@ struct mlxsw_config_profile {
u32 kvd_linear_size; u32 kvd_linear_size;
u8 kvd_hash_single_parts; u8 kvd_hash_single_parts;
u8 kvd_hash_double_parts; u8 kvd_hash_double_parts;
u8 kvh_xlt_cache_mode;
struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT]; struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
}; };
...@@ -478,8 +475,6 @@ struct mlxsw_fw_rev { ...@@ -478,8 +475,6 @@ struct mlxsw_fw_rev {
u16 can_reset_minor; u16 can_reset_minor;
}; };
#define MLXSW_BUS_INFO_XM_LOCAL_PORTS_MAX 4
struct mlxsw_bus_info { struct mlxsw_bus_info {
const char *device_kind; const char *device_kind;
const char *device_name; const char *device_name;
...@@ -488,10 +483,7 @@ struct mlxsw_bus_info { ...@@ -488,10 +483,7 @@ struct mlxsw_bus_info {
u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN]; u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN]; u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
u8 low_frequency:1, u8 low_frequency:1,
read_frc_capable:1, read_frc_capable:1;
xm_exists:1;
u8 xm_local_ports_count;
u8 xm_local_ports[MLXSW_BUS_INFO_XM_LOCAL_PORTS_MAX];
}; };
struct mlxsw_hwmon; struct mlxsw_hwmon;
......
...@@ -359,8 +359,7 @@ static int mlxsw_m_ports_create(struct mlxsw_m *mlxsw_m) ...@@ -359,8 +359,7 @@ static int mlxsw_m_ports_create(struct mlxsw_m *mlxsw_m)
/* Create port objects for each valid entry */ /* Create port objects for each valid entry */
devl_lock(devlink); devl_lock(devlink);
for (i = 0; i < mlxsw_m->max_ports; i++) { for (i = 0; i < mlxsw_m->max_ports; i++) {
if (mlxsw_m->module_to_port[i] > 0 && if (mlxsw_m->module_to_port[i] > 0) {
!mlxsw_core_port_is_xm(mlxsw_m->core, i)) {
err = mlxsw_m_port_create(mlxsw_m, err = mlxsw_m_port_create(mlxsw_m,
mlxsw_m->module_to_port[i], mlxsw_m->module_to_port[i],
i); i);
......
...@@ -1252,12 +1252,6 @@ static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox, ...@@ -1252,12 +1252,6 @@ static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,
mlxsw_cmd_mbox_config_profile_kvd_hash_double_size_set(mbox, mlxsw_cmd_mbox_config_profile_kvd_hash_double_size_set(mbox,
MLXSW_RES_GET(res, KVD_DOUBLE_SIZE)); MLXSW_RES_GET(res, KVD_DOUBLE_SIZE));
} }
if (profile->used_kvh_xlt_cache_mode) {
mlxsw_cmd_mbox_config_profile_set_kvh_xlt_cache_mode_set(
mbox, 1);
mlxsw_cmd_mbox_config_profile_kvh_xlt_cache_mode_set(
mbox, profile->kvh_xlt_cache_mode);
}
for (i = 0; i < MLXSW_CONFIG_PROFILE_SWID_COUNT; i++) for (i = 0; i < MLXSW_CONFIG_PROFILE_SWID_COUNT; i++)
mlxsw_pci_config_profile_swid_config(mlxsw_pci, mbox, i, mlxsw_pci_config_profile_swid_config(mlxsw_pci, mbox, i,
...@@ -1271,30 +1265,6 @@ static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox, ...@@ -1271,30 +1265,6 @@ static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,
return mlxsw_cmd_config_profile_set(mlxsw_pci->core, mbox); return mlxsw_cmd_config_profile_set(mlxsw_pci->core, mbox);
} }
static int mlxsw_pci_boardinfo_xm_process(struct mlxsw_pci *mlxsw_pci,
struct mlxsw_bus_info *bus_info,
char *mbox)
{
int count = mlxsw_cmd_mbox_boardinfo_xm_num_local_ports_get(mbox);
int i;
if (!mlxsw_cmd_mbox_boardinfo_xm_exists_get(mbox))
return 0;
bus_info->xm_exists = true;
if (count > MLXSW_BUS_INFO_XM_LOCAL_PORTS_MAX) {
dev_err(&mlxsw_pci->pdev->dev, "Invalid number of XM local ports\n");
return -EINVAL;
}
bus_info->xm_local_ports_count = count;
for (i = 0; i < count; i++)
bus_info->xm_local_ports[i] =
mlxsw_cmd_mbox_boardinfo_xm_local_port_entry_get(mbox,
i);
return 0;
}
static int mlxsw_pci_boardinfo(struct mlxsw_pci *mlxsw_pci, char *mbox) static int mlxsw_pci_boardinfo(struct mlxsw_pci *mlxsw_pci, char *mbox)
{ {
struct mlxsw_bus_info *bus_info = &mlxsw_pci->bus_info; struct mlxsw_bus_info *bus_info = &mlxsw_pci->bus_info;
...@@ -1306,8 +1276,7 @@ static int mlxsw_pci_boardinfo(struct mlxsw_pci *mlxsw_pci, char *mbox) ...@@ -1306,8 +1276,7 @@ static int mlxsw_pci_boardinfo(struct mlxsw_pci *mlxsw_pci, char *mbox)
return err; return err;
mlxsw_cmd_mbox_boardinfo_vsd_memcpy_from(mbox, bus_info->vsd); mlxsw_cmd_mbox_boardinfo_vsd_memcpy_from(mbox, bus_info->vsd);
mlxsw_cmd_mbox_boardinfo_psid_memcpy_from(mbox, bus_info->psid); mlxsw_cmd_mbox_boardinfo_psid_memcpy_from(mbox, bus_info->psid);
return 0;
return mlxsw_pci_boardinfo_xm_process(mlxsw_pci, bus_info, mbox);
} }
static int mlxsw_pci_fw_area_init(struct mlxsw_pci *mlxsw_pci, char *mbox, static int mlxsw_pci_fw_area_init(struct mlxsw_pci *mlxsw_pci, char *mbox,
......
This diff is collapsed.
...@@ -2105,9 +2105,6 @@ static int mlxsw_sp_port_module_info_init(struct mlxsw_sp *mlxsw_sp) ...@@ -2105,9 +2105,6 @@ static int mlxsw_sp_port_module_info_init(struct mlxsw_sp *mlxsw_sp)
return -ENOMEM; return -ENOMEM;
for (i = 1; i < max_ports; i++) { for (i = 1; i < max_ports; i++) {
if (mlxsw_core_port_is_xm(mlxsw_sp->core, i))
continue;
port_mapping = &mlxsw_sp->port_mapping[i]; port_mapping = &mlxsw_sp->port_mapping[i];
err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, port_mapping); err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, port_mapping);
if (err) if (err)
...@@ -3410,8 +3407,6 @@ static const struct mlxsw_config_profile mlxsw_sp2_config_profile = { ...@@ -3410,8 +3407,6 @@ static const struct mlxsw_config_profile mlxsw_sp2_config_profile = {
.max_ib_mc = 0, .max_ib_mc = 0,
.used_max_pkey = 1, .used_max_pkey = 1,
.max_pkey = 0, .max_pkey = 0,
.used_kvh_xlt_cache_mode = 1,
.kvh_xlt_cache_mode = 1,
.swid_config = { .swid_config = {
{ {
.used_type = 1, .used_type = 1,
......
...@@ -551,12 +551,6 @@ struct mlxsw_sp_vr { ...@@ -551,12 +551,6 @@ struct mlxsw_sp_vr {
refcount_t ul_rif_refcnt; refcount_t ul_rif_refcnt;
}; };
static int mlxsw_sp_router_ll_basic_init(struct mlxsw_sp *mlxsw_sp, u16 vr_id,
enum mlxsw_sp_l3proto proto)
{
return 0;
}
static int mlxsw_sp_router_ll_basic_ralta_write(struct mlxsw_sp *mlxsw_sp, char *xralta_pl) static int mlxsw_sp_router_ll_basic_ralta_write(struct mlxsw_sp *mlxsw_sp, char *xralta_pl)
{ {
return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralta), return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralta),
...@@ -586,10 +580,6 @@ static struct mlxsw_sp_fib *mlxsw_sp_fib_create(struct mlxsw_sp *mlxsw_sp, ...@@ -586,10 +580,6 @@ static struct mlxsw_sp_fib *mlxsw_sp_fib_create(struct mlxsw_sp *mlxsw_sp,
struct mlxsw_sp_fib *fib; struct mlxsw_sp_fib *fib;
int err; int err;
err = ll_ops->init(mlxsw_sp, vr->id, proto);
if (err)
return ERR_PTR(err);
lpm_tree = mlxsw_sp->router->lpm.proto_trees[proto]; lpm_tree = mlxsw_sp->router->lpm.proto_trees[proto];
fib = kzalloc(sizeof(*fib), GFP_KERNEL); fib = kzalloc(sizeof(*fib), GFP_KERNEL);
if (!fib) if (!fib)
...@@ -7770,7 +7760,6 @@ static void mlxsw_sp_router_fib_event_work(struct work_struct *work) ...@@ -7770,7 +7760,6 @@ static void mlxsw_sp_router_fib_event_work(struct work_struct *work)
op_ctx->bulk_ok = !list_is_last(&fib_event->list, &fib_event_queue) && op_ctx->bulk_ok = !list_is_last(&fib_event->list, &fib_event_queue) &&
fib_event->family == next_fib_event->family && fib_event->family == next_fib_event->family &&
fib_event->event == next_fib_event->event; fib_event->event == next_fib_event->event;
op_ctx->event = fib_event->event;
/* In case family of this and the previous entry are different, context /* In case family of this and the previous entry are different, context
* reinitialization is going to be needed now, indicate that. * reinitialization is going to be needed now, indicate that.
...@@ -10534,7 +10523,6 @@ static void __mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp) ...@@ -10534,7 +10523,6 @@ static void __mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp)
} }
static const struct mlxsw_sp_router_ll_ops mlxsw_sp_router_ll_basic_ops = { static const struct mlxsw_sp_router_ll_ops mlxsw_sp_router_ll_basic_ops = {
.init = mlxsw_sp_router_ll_basic_init,
.ralta_write = mlxsw_sp_router_ll_basic_ralta_write, .ralta_write = mlxsw_sp_router_ll_basic_ralta_write,
.ralst_write = mlxsw_sp_router_ll_basic_ralst_write, .ralst_write = mlxsw_sp_router_ll_basic_ralst_write,
.raltb_write = mlxsw_sp_router_ll_basic_raltb_write, .raltb_write = mlxsw_sp_router_ll_basic_raltb_write,
...@@ -10646,13 +10634,7 @@ int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp, ...@@ -10646,13 +10634,7 @@ int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp,
if (err) if (err)
goto err_router_ops_init; goto err_router_ops_init;
err = mlxsw_sp_router_xm_init(mlxsw_sp); router->proto_ll_ops[MLXSW_SP_L3_PROTO_IPV4] = &mlxsw_sp_router_ll_basic_ops;
if (err)
goto err_xm_init;
router->proto_ll_ops[MLXSW_SP_L3_PROTO_IPV4] = mlxsw_sp_router_xm_ipv4_is_supported(mlxsw_sp) ?
&mlxsw_sp_router_ll_xm_ops :
&mlxsw_sp_router_ll_basic_ops;
router->proto_ll_ops[MLXSW_SP_L3_PROTO_IPV6] = &mlxsw_sp_router_ll_basic_ops; router->proto_ll_ops[MLXSW_SP_L3_PROTO_IPV6] = &mlxsw_sp_router_ll_basic_ops;
err = mlxsw_sp_router_ll_op_ctx_init(router); err = mlxsw_sp_router_ll_op_ctx_init(router);
...@@ -10799,8 +10781,6 @@ int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp, ...@@ -10799,8 +10781,6 @@ int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp,
cancel_delayed_work_sync(&mlxsw_sp->router->nh_grp_activity_dw); cancel_delayed_work_sync(&mlxsw_sp->router->nh_grp_activity_dw);
mlxsw_sp_router_ll_op_ctx_fini(router); mlxsw_sp_router_ll_op_ctx_fini(router);
err_ll_op_ctx_init: err_ll_op_ctx_init:
mlxsw_sp_router_xm_fini(mlxsw_sp);
err_xm_init:
err_router_ops_init: err_router_ops_init:
mutex_destroy(&mlxsw_sp->router->lock); mutex_destroy(&mlxsw_sp->router->lock);
kfree(mlxsw_sp->router); kfree(mlxsw_sp->router);
...@@ -10832,7 +10812,6 @@ void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp) ...@@ -10832,7 +10812,6 @@ void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp)
__mlxsw_sp_router_fini(mlxsw_sp); __mlxsw_sp_router_fini(mlxsw_sp);
cancel_delayed_work_sync(&mlxsw_sp->router->nh_grp_activity_dw); cancel_delayed_work_sync(&mlxsw_sp->router->nh_grp_activity_dw);
mlxsw_sp_router_ll_op_ctx_fini(mlxsw_sp->router); mlxsw_sp_router_ll_op_ctx_fini(mlxsw_sp->router);
mlxsw_sp_router_xm_fini(mlxsw_sp);
mutex_destroy(&mlxsw_sp->router->lock); mutex_destroy(&mlxsw_sp->router->lock);
kfree(mlxsw_sp->router); kfree(mlxsw_sp->router);
} }
...@@ -24,7 +24,6 @@ struct mlxsw_sp_fib_entry_op_ctx { ...@@ -24,7 +24,6 @@ struct mlxsw_sp_fib_entry_op_ctx {
* the context priv is initialized. * the context priv is initialized.
*/ */
struct list_head fib_entry_priv_list; struct list_head fib_entry_priv_list;
unsigned long event;
unsigned long ll_priv[]; unsigned long ll_priv[];
}; };
...@@ -79,7 +78,6 @@ struct mlxsw_sp_router { ...@@ -79,7 +78,6 @@ struct mlxsw_sp_router {
const struct mlxsw_sp_router_ll_ops *proto_ll_ops[MLXSW_SP_L3_PROTO_MAX]; const struct mlxsw_sp_router_ll_ops *proto_ll_ops[MLXSW_SP_L3_PROTO_MAX];
struct mlxsw_sp_fib_entry_op_ctx *ll_op_ctx; struct mlxsw_sp_fib_entry_op_ctx *ll_op_ctx;
u16 lb_rif_index; u16 lb_rif_index;
struct mlxsw_sp_router_xm *xm;
const struct mlxsw_sp_adj_grp_size_range *adj_grp_size_ranges; const struct mlxsw_sp_adj_grp_size_range *adj_grp_size_ranges;
size_t adj_grp_size_ranges_count; size_t adj_grp_size_ranges_count;
struct delayed_work nh_grp_activity_dw; struct delayed_work nh_grp_activity_dw;
...@@ -105,8 +103,6 @@ enum mlxsw_sp_fib_entry_op { ...@@ -105,8 +103,6 @@ enum mlxsw_sp_fib_entry_op {
* register sets to work with ordinary and XM trees and FIB entries. * register sets to work with ordinary and XM trees and FIB entries.
*/ */
struct mlxsw_sp_router_ll_ops { struct mlxsw_sp_router_ll_ops {
int (*init)(struct mlxsw_sp *mlxsw_sp, u16 vr_id,
enum mlxsw_sp_l3proto proto);
int (*ralta_write)(struct mlxsw_sp *mlxsw_sp, char *xralta_pl); int (*ralta_write)(struct mlxsw_sp *mlxsw_sp, char *xralta_pl);
int (*ralst_write)(struct mlxsw_sp *mlxsw_sp, char *xralst_pl); int (*ralst_write)(struct mlxsw_sp *mlxsw_sp, char *xralst_pl);
int (*raltb_write)(struct mlxsw_sp *mlxsw_sp, char *xraltb_pl); int (*raltb_write)(struct mlxsw_sp *mlxsw_sp, char *xraltb_pl);
...@@ -232,10 +228,4 @@ int mlxsw_sp_ipip_ecn_decap_init(struct mlxsw_sp *mlxsw_sp); ...@@ -232,10 +228,4 @@ int mlxsw_sp_ipip_ecn_decap_init(struct mlxsw_sp *mlxsw_sp);
struct net_device * struct net_device *
mlxsw_sp_ipip_netdev_ul_dev_get(const struct net_device *ol_dev); mlxsw_sp_ipip_netdev_ul_dev_get(const struct net_device *ol_dev);
extern const struct mlxsw_sp_router_ll_ops mlxsw_sp_router_ll_xm_ops;
int mlxsw_sp_router_xm_init(struct mlxsw_sp *mlxsw_sp);
void mlxsw_sp_router_xm_fini(struct mlxsw_sp *mlxsw_sp);
bool mlxsw_sp_router_xm_ipv4_is_supported(const struct mlxsw_sp *mlxsw_sp);
#endif /* _MLXSW_ROUTER_H_*/ #endif /* _MLXSW_ROUTER_H_*/
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