Commit 6ad6b5ed authored by Amitoj Kaur Chawla's avatar Amitoj Kaur Chawla Committed by Greg Kroah-Hartman

Staging: sm750fb: Fix C99 Comments

Used C89 instead of C99 Comment and removed C99 comments performing prints only.
Problem found using checkpatch.pl
ERROR: do not use C99 // comments
Signed-off-by: default avatarAmitoj Kaur Chawla <amitoj1606@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent ecfd2267
...@@ -17,7 +17,7 @@ logical_chip_type_t getChipType(void) ...@@ -17,7 +17,7 @@ logical_chip_type_t getChipType(void)
char physicalRev; char physicalRev;
logical_chip_type_t chip; logical_chip_type_t chip;
physicalID = devId750;//either 0x718 or 0x750 physicalID = devId750; /* either 0x718 or 0x750 */
physicalRev = revId750; physicalRev = revId750;
if (physicalID == 0x718) if (physicalID == 0x718)
...@@ -256,7 +256,7 @@ int ddk750_initHw(initchip_param_t *pInitParam) ...@@ -256,7 +256,7 @@ int ddk750_initHw(initchip_param_t *pInitParam)
unsigned int ulReg; unsigned int ulReg;
#if 0 #if 0
//move the code to map regiter function. /* move the code to map regiter function. */
if (getChipType() == SM718) { if (getChipType() == SM718) {
/* turn on big endian bit*/ /* turn on big endian bit*/
ulReg = PEEK32(0x74); ulReg = PEEK32(0x74);
...@@ -487,7 +487,6 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) ...@@ -487,7 +487,6 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
} }
} }
//printk("Finally: pll->n[%lu],m[%lu],od[%lu],pod[%lu]\n",pll->N,pll->M,pll->OD,pll->POD);
return ret; return ret;
} }
...@@ -579,14 +578,9 @@ pll_value_t *pPLL /* Structure to hold the value to be set in PLL */ ...@@ -579,14 +578,9 @@ pll_value_t *pPLL /* Structure to hold the value to be set in PLL */
} }
/* Restore input frequency from Khz to hz unit */ /* Restore input frequency from Khz to hz unit */
// pPLL->inputFreq *= 1000;
ulRequestClk *= 1000; ulRequestClk *= 1000;
pPLL->inputFreq = DEFAULT_INPUT_CLOCK; /* Default reference clock */ pPLL->inputFreq = DEFAULT_INPUT_CLOCK; /* Default reference clock */
/* Output debug information */
//DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Requested Frequency = %d\n", ulRequestClk));
//DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Input CLK = %dHz, M=%d, N=%d, OD=%d, POD=%d\n", pPLL->inputFreq, pPLL->M, pPLL->N, pPLL->OD, pPLL->POD));
/* Return actual frequency that the PLL can set */ /* Return actual frequency that the PLL can set */
ret = calcPLL(pPLL); ret = calcPLL(pPLL);
return ret; return ret;
......
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