Commit 6ad7cb71 authored by Daniel Baluta's avatar Daniel Baluta Committed by Shawn Guo

clk: imx8: Add DSP related clocks

i.MX8QXP contains Hifi4 DSP. There are four clocks
associated with DSP:
  * dsp_lpcg_core_clk
  * dsp_lpcg_ipg_clk
  * dsp_lpcg_adb_aclk
  * ocram_lpcg_ipg_clk
Signed-off-by: default avatarDaniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 96d6392b
...@@ -72,6 +72,11 @@ static const struct imx8qxp_lpcg_data imx8qxp_lpcg_adma[] = { ...@@ -72,6 +72,11 @@ static const struct imx8qxp_lpcg_data imx8qxp_lpcg_adma[] = {
{ IMX_ADMA_LPCG_I2C2_CLK, "i2c2_lpcg_clk", "i2c2_clk", 0, ADMA_LPI2C_2_LPCG, 0, 0, }, { IMX_ADMA_LPCG_I2C2_CLK, "i2c2_lpcg_clk", "i2c2_clk", 0, ADMA_LPI2C_2_LPCG, 0, 0, },
{ IMX_ADMA_LPCG_I2C3_IPG_CLK, "i2c3_lpcg_ipg_clk", "dma_ipg_clk_root", 0, ADMA_LPI2C_3_LPCG, 16, 0, }, { IMX_ADMA_LPCG_I2C3_IPG_CLK, "i2c3_lpcg_ipg_clk", "dma_ipg_clk_root", 0, ADMA_LPI2C_3_LPCG, 16, 0, },
{ IMX_ADMA_LPCG_I2C3_CLK, "i2c3_lpcg_clk", "i2c3_clk", 0, ADMA_LPI2C_3_LPCG, 0, 0, }, { IMX_ADMA_LPCG_I2C3_CLK, "i2c3_lpcg_clk", "i2c3_clk", 0, ADMA_LPI2C_3_LPCG, 0, 0, },
{ IMX_ADMA_LPCG_DSP_CORE_CLK, "dsp_lpcg_core_clk", "dma_ipg_clk_root", 0, ADMA_HIFI_LPCG, 28, 0, },
{ IMX_ADMA_LPCG_DSP_IPG_CLK, "dsp_lpcg_ipg_clk", "dma_ipg_clk_root", 0, ADMA_HIFI_LPCG, 20, 0, },
{ IMX_ADMA_LPCG_DSP_ADB_CLK, "dsp_lpcg_adb_clk", "dma_ipg_clk_root", 0, ADMA_HIFI_LPCG, 16, 0, },
{ IMX_ADMA_LPCG_OCRAM_IPG_CLK, "ocram_lpcg_ipg_clk", "dma_ipg_clk_root", 0, ADMA_OCRAM_LPCG, 16, 0, },
}; };
static const struct imx8qxp_ss_lpcg imx8qxp_ss_adma = { static const struct imx8qxp_ss_lpcg imx8qxp_ss_adma = {
......
...@@ -283,7 +283,11 @@ ...@@ -283,7 +283,11 @@
#define IMX_ADMA_LPCG_PWM_IPG_CLK 38 #define IMX_ADMA_LPCG_PWM_IPG_CLK 38
#define IMX_ADMA_LPCG_LCD_PIX_CLK 39 #define IMX_ADMA_LPCG_LCD_PIX_CLK 39
#define IMX_ADMA_LPCG_LCD_APB_CLK 40 #define IMX_ADMA_LPCG_LCD_APB_CLK 40
#define IMX_ADMA_LPCG_DSP_ADB_CLK 41
#define IMX_ADMA_LPCG_DSP_IPG_CLK 42
#define IMX_ADMA_LPCG_DSP_CORE_CLK 43
#define IMX_ADMA_LPCG_OCRAM_IPG_CLK 44
#define IMX_ADMA_LPCG_CLK_END 41 #define IMX_ADMA_LPCG_CLK_END 45
#endif /* __DT_BINDINGS_CLOCK_IMX_H */ #endif /* __DT_BINDINGS_CLOCK_IMX_H */
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