Commit 6baa9b20 authored by Sam Ravnborg's avatar Sam Ravnborg Committed by David S. Miller

sparc32: genirq support

The conversion of sparc32 to genirq is based on original work done
by David S. Miller.
Daniel Hellstrom has helped in the conversion and implemented
the shutdowm functionality.
Marcel van Nies <morcles@gmail.com> has tested this on Sparc Station 20

Test status:
sun4c      - not tested
sun4m,pci  - not tested
sun4m,sbus - tested (Sparc Classic, Sparc Station 5, Sparc Station 20)
sun4d      - not tested
leon       - tested on various combinations of leon boards,
             including SMP variants

generic
   Introduce use of GENERIC_HARDIRQS and GENERIC_IRQ_SHOW
   Allocate 64 IRQs - which is enough even for SS2000
   Use a table of irq_bucket to maintain uses IRQs
      irq_bucket is also used to chain several irq's that
      must be called when the same intrrupt is asserted
   Use irq_link to link a interrupt source to the irq
   All plafforms must now supply their own build_device_irq method
   handler_irq rewriten to use generic irq support

floppy
   Read FLOPPY_IRQ from platform device
   Use generic request_irq to register the floppy interrupt
   Rewrote sparc_floppy_irq to use the generic irq support

pcic:
   Introduce irq_chip
   Store mask in chip_data for use in mask/unmask functions
   Add build_device_irq for pcic
   Use pcic_build_device_irq in pci_time_init
   allocate virtual irqs in pcic_fill_irq

sun4c:
   Introduce irq_chip
   Store mask in chip_data for use in mask/unmask functions
   Add build_device_irq for sun4c
   Use sun4c_build_device_irq in sun4c_init_timers

sun4m:
   Introduce irq_chip
   Introduce dedicated mask/unmask methods
   Introduce sun4m_handler_data that allow easy access to necessary
     data in the mask/unmask functions
   Add a helper method to enable profile_timer (used from smp)
   Added sun4m_build_device_irq
   Use sun4m_build_device_irq in sun4m_init_timers

   TODO:
      There is no replacement for smp_rotate that always scheduled
      next CPU as interrupt target upon an interrupt

sun4d:
   Introduce irq_chip
   Introduce dedicated mask/unmask methods
   Introduce sun4d_handler_data that allow easy access to
   necessary data in mask/unmask fuctions
   Rewrote sun4d_handler_irq to use generic irq support

   TODO:
      The original implmentation of enable/disable had:

          if (irq < NR_IRQS)
               return;

      The new implmentation does not distingush between SBUS and cpu
      interrupts.
      I am no sure what is right here. I assume we need to do
      something for the cpu interrupts.

      I have not succeeded booting my sun4d box (with or without this patch)
      and my understanding of this platfrom is limited.
      So I would be a bit suprised if this works.

leon:
   Introduce irq_chip
   Store mask in chip_data for use in mask/unmask functions
   Add build_device_irq for leon
   Use leon_build_device_irq in leon_init_timers
Signed-off-by: default avatarSam Ravnborg <sam@ravnborg.org>
Acked-by: default avatarDaniel Hellstrom <daniel@gaisler.com>
Tested-by: default avatarDaniel Hellstrom <daniel@gaisler.com>
Tested-by: default avatarMarcel van Nies <morcles@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 06010fb5
...@@ -25,6 +25,10 @@ config SPARC ...@@ -25,6 +25,10 @@ config SPARC
select HAVE_DMA_ATTRS select HAVE_DMA_ATTRS
select HAVE_DMA_API_DEBUG select HAVE_DMA_API_DEBUG
select HAVE_ARCH_JUMP_LABEL select HAVE_ARCH_JUMP_LABEL
select HAVE_GENERIC_HARDIRQS
select GENERIC_HARDIRQS_NO_DEPRECATED
select GENERIC_IRQ_SHOW
config SPARC32 config SPARC32
def_bool !64BIT def_bool !64BIT
...@@ -50,8 +54,6 @@ config SPARC64 ...@@ -50,8 +54,6 @@ config SPARC64
select RTC_DRV_STARFIRE select RTC_DRV_STARFIRE
select HAVE_PERF_EVENTS select HAVE_PERF_EVENTS
select PERF_USE_VMALLOC select PERF_USE_VMALLOC
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW
select IRQ_PREFLOW_FASTEOI select IRQ_PREFLOW_FASTEOI
config ARCH_DEFCONFIG config ARCH_DEFCONFIG
......
...@@ -281,28 +281,27 @@ static inline void sun_fd_enable_dma(void) ...@@ -281,28 +281,27 @@ static inline void sun_fd_enable_dma(void)
pdma_areasize = pdma_size; pdma_areasize = pdma_size;
} }
/* Our low-level entry point in arch/sparc/kernel/entry.S */ extern int sparc_floppy_request_irq(unsigned int irq,
extern int sparc_floppy_request_irq(int irq, unsigned long flags, irq_handler_t irq_handler);
irq_handler_t irq_handler);
static int sun_fd_request_irq(void) static int sun_fd_request_irq(void)
{ {
static int once = 0; static int once = 0;
int error;
if(!once) { if (!once) {
once = 1; once = 1;
error = sparc_floppy_request_irq(FLOPPY_IRQ, return sparc_floppy_request_irq(FLOPPY_IRQ, floppy_interrupt);
IRQF_DISABLED, } else {
floppy_interrupt); return 0;
return ((error == 0) ? 0 : -1); }
} else return 0;
} }
static struct linux_prom_registers fd_regs[2]; static struct linux_prom_registers fd_regs[2];
static int sun_floppy_init(void) static int sun_floppy_init(void)
{ {
struct platform_device *op;
struct device_node *dp;
char state[128]; char state[128];
phandle tnode, fd_node; phandle tnode, fd_node;
int num_regs; int num_regs;
...@@ -310,7 +309,6 @@ static int sun_floppy_init(void) ...@@ -310,7 +309,6 @@ static int sun_floppy_init(void)
use_virtual_dma = 1; use_virtual_dma = 1;
FLOPPY_IRQ = 11;
/* Forget it if we aren't on a machine that could possibly /* Forget it if we aren't on a machine that could possibly
* ever have a floppy drive. * ever have a floppy drive.
*/ */
...@@ -349,6 +347,26 @@ static int sun_floppy_init(void) ...@@ -349,6 +347,26 @@ static int sun_floppy_init(void)
sun_fdc = (struct sun_flpy_controller *) sun_fdc = (struct sun_flpy_controller *)
of_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); of_ioremap(&r, 0, fd_regs[0].reg_size, "floppy");
/* Look up irq in platform_device.
* We try "SUNW,fdtwo" and "fd"
*/
for_each_node_by_name(dp, "SUNW,fdtwo") {
op = of_find_device_by_node(dp);
if (op)
break;
}
if (!op) {
for_each_node_by_name(dp, "fd") {
op = of_find_device_by_node(dp);
if (op)
break;
}
}
if (!op)
goto no_sun_fdc;
FLOPPY_IRQ = op->archdata.irqs[0];
/* Last minute sanity check... */ /* Last minute sanity check... */
if(sun_fdc->status_82072 == 0xff) { if(sun_fdc->status_82072 == 0xff) {
sun_fdc = NULL; sun_fdc = NULL;
......
...@@ -6,7 +6,11 @@ ...@@ -6,7 +6,11 @@
#ifndef _SPARC_IRQ_H #ifndef _SPARC_IRQ_H
#define _SPARC_IRQ_H #define _SPARC_IRQ_H
#define NR_IRQS 16 /* Allocated number of logical irq numbers.
* sun4d boxes (ss2000e) should be OK with ~32.
* Be on the safe side and make room for 64
*/
#define NR_IRQS 64
#include <linux/interrupt.h> #include <linux/interrupt.h>
......
...@@ -15,11 +15,6 @@ ...@@ -15,11 +15,6 @@
#include <linux/irqflags.h> #include <linux/irqflags.h>
static inline unsigned int probe_irq_mask(unsigned long val)
{
return 0;
}
/* /*
* Sparc (general) CPU types * Sparc (general) CPU types
*/ */
......
...@@ -71,10 +71,6 @@ obj-$(CONFIG_SPARC64) += pcr.o ...@@ -71,10 +71,6 @@ obj-$(CONFIG_SPARC64) += pcr.o
obj-$(CONFIG_SPARC64) += nmi.o obj-$(CONFIG_SPARC64) += nmi.o
obj-$(CONFIG_SPARC64_SMP) += cpumap.o obj-$(CONFIG_SPARC64_SMP) += cpumap.o
# sparc32 do not use GENERIC_HARDIRQS but uses the generic devres implementation
obj-$(CONFIG_SPARC32) += devres.o
devres-y := ../../../kernel/irq/devres.o
obj-y += dma.o obj-y += dma.o
obj-$(CONFIG_SPARC32_PCI) += pcic.o obj-$(CONFIG_SPARC32_PCI) += pcic.o
......
...@@ -2,6 +2,23 @@ ...@@ -2,6 +2,23 @@
#include <asm/btfixup.h> #include <asm/btfixup.h>
struct irq_bucket {
struct irq_bucket *next;
unsigned int real_irq;
unsigned int irq;
unsigned int pil;
};
#define SUN4D_MAX_BOARD 10
#define SUN4D_MAX_IRQ ((SUN4D_MAX_BOARD + 2) << 5)
/* Map between the irq identifier used in hw to the
* irq_bucket. The map is sufficient large to hold
* the sun4d hw identifiers.
*/
extern struct irq_bucket *irq_map[SUN4D_MAX_IRQ];
/* sun4m specific type definitions */ /* sun4m specific type definitions */
/* This maps direct to CPU specific interrupt registers */ /* This maps direct to CPU specific interrupt registers */
...@@ -35,6 +52,10 @@ struct sparc_irq_config { ...@@ -35,6 +52,10 @@ struct sparc_irq_config {
}; };
extern struct sparc_irq_config sparc_irq_config; extern struct sparc_irq_config sparc_irq_config;
unsigned int irq_alloc(unsigned int real_irq, unsigned int pil);
void irq_link(unsigned int irq);
void irq_unlink(unsigned int irq);
void handler_irq(unsigned int pil, struct pt_regs *regs);
/* Dave Redman (djhr@tadpole.co.uk) /* Dave Redman (djhr@tadpole.co.uk)
* changed these to function pointers.. it saves cycles and will allow * changed these to function pointers.. it saves cycles and will allow
...@@ -44,33 +65,9 @@ extern struct sparc_irq_config sparc_irq_config; ...@@ -44,33 +65,9 @@ extern struct sparc_irq_config sparc_irq_config;
* Changed these to btfixup entities... It saves cycles :) * Changed these to btfixup entities... It saves cycles :)
*/ */
BTFIXUPDEF_CALL(void, disable_irq, unsigned int)
BTFIXUPDEF_CALL(void, enable_irq, unsigned int)
BTFIXUPDEF_CALL(void, disable_pil_irq, unsigned int)
BTFIXUPDEF_CALL(void, enable_pil_irq, unsigned int)
BTFIXUPDEF_CALL(void, clear_clock_irq, void) BTFIXUPDEF_CALL(void, clear_clock_irq, void)
BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int) BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int)
static inline void __disable_irq(unsigned int irq)
{
BTFIXUP_CALL(disable_irq)(irq);
}
static inline void __enable_irq(unsigned int irq)
{
BTFIXUP_CALL(enable_irq)(irq);
}
static inline void disable_pil_irq(unsigned int irq)
{
BTFIXUP_CALL(disable_pil_irq)(irq);
}
static inline void enable_pil_irq(unsigned int irq)
{
BTFIXUP_CALL(enable_pil_irq)(irq);
}
static inline void clear_clock_irq(void) static inline void clear_clock_irq(void)
{ {
BTFIXUP_CALL(clear_clock_irq)(); BTFIXUP_CALL(clear_clock_irq)();
......
This diff is collapsed.
...@@ -37,6 +37,7 @@ extern void sun4c_init_IRQ(void); ...@@ -37,6 +37,7 @@ extern void sun4c_init_IRQ(void);
extern unsigned int lvl14_resolution; extern unsigned int lvl14_resolution;
extern void sun4m_init_IRQ(void); extern void sun4m_init_IRQ(void);
extern void sun4m_unmask_profile_irq(void);
extern void sun4m_clear_profile_irq(int cpu); extern void sun4m_clear_profile_irq(int cpu);
/* sun4d_irq.c */ /* sun4d_irq.c */
......
...@@ -83,20 +83,22 @@ static inline unsigned long get_irqmask(unsigned int irq) ...@@ -83,20 +83,22 @@ static inline unsigned long get_irqmask(unsigned int irq)
return mask; return mask;
} }
static void leon_enable_irq(unsigned int irq_nr) static void leon_unmask_irq(struct irq_data *data)
{ {
unsigned long mask, flags; unsigned long mask, flags;
mask = get_irqmask(irq_nr);
mask = (unsigned long)data->chip_data;
local_irq_save(flags); local_irq_save(flags);
LEON3_BYPASS_STORE_PA(LEON_IMASK, LEON3_BYPASS_STORE_PA(LEON_IMASK,
(LEON3_BYPASS_LOAD_PA(LEON_IMASK) | (mask))); (LEON3_BYPASS_LOAD_PA(LEON_IMASK) | (mask)));
local_irq_restore(flags); local_irq_restore(flags);
} }
static void leon_disable_irq(unsigned int irq_nr) static void leon_mask_irq(struct irq_data *data)
{ {
unsigned long mask, flags; unsigned long mask, flags;
mask = get_irqmask(irq_nr);
mask = (unsigned long)data->chip_data;
local_irq_save(flags); local_irq_save(flags);
LEON3_BYPASS_STORE_PA(LEON_IMASK, LEON3_BYPASS_STORE_PA(LEON_IMASK,
(LEON3_BYPASS_LOAD_PA(LEON_IMASK) & ~(mask))); (LEON3_BYPASS_LOAD_PA(LEON_IMASK) & ~(mask)));
...@@ -104,6 +106,50 @@ static void leon_disable_irq(unsigned int irq_nr) ...@@ -104,6 +106,50 @@ static void leon_disable_irq(unsigned int irq_nr)
} }
static unsigned int leon_startup_irq(struct irq_data *data)
{
irq_link(data->irq);
leon_unmask_irq(data);
return 0;
}
static void leon_shutdown_irq(struct irq_data *data)
{
leon_mask_irq(data);
irq_unlink(data->irq);
}
static struct irq_chip leon_irq = {
.name = "leon",
.irq_startup = leon_startup_irq,
.irq_shutdown = leon_shutdown_irq,
.irq_mask = leon_mask_irq,
.irq_unmask = leon_unmask_irq,
};
static unsigned int leon_build_device_irq(struct platform_device *op,
unsigned int real_irq)
{
unsigned int irq;
unsigned long mask;
irq = 0;
mask = get_irqmask(real_irq);
if (mask == 0)
goto out;
irq = irq_alloc(real_irq, real_irq);
if (irq == 0)
goto out;
irq_set_chip_and_handler_name(irq, &leon_irq,
handle_simple_irq, "edge");
irq_set_chip_data(irq, (void *)mask);
out:
return irq;
}
void __init leon_init_timers(irq_handler_t counter_fn) void __init leon_init_timers(irq_handler_t counter_fn)
{ {
int irq; int irq;
...@@ -112,6 +158,7 @@ void __init leon_init_timers(irq_handler_t counter_fn) ...@@ -112,6 +158,7 @@ void __init leon_init_timers(irq_handler_t counter_fn)
int len; int len;
int cpu, icsel; int cpu, icsel;
int ampopts; int ampopts;
int err;
leondebug_irq_disable = 0; leondebug_irq_disable = 0;
leon_debug_irqout = 0; leon_debug_irqout = 0;
...@@ -219,11 +266,10 @@ void __init leon_init_timers(irq_handler_t counter_fn) ...@@ -219,11 +266,10 @@ void __init leon_init_timers(irq_handler_t counter_fn)
goto bad; goto bad;
} }
irq = request_irq(leon3_gptimer_irq+leon3_gptimer_idx, irq = leon_build_device_irq(NULL, leon3_gptimer_irq + leon3_gptimer_idx);
counter_fn, err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL);
(IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL);
if (irq) { if (err) {
printk(KERN_ERR "leon_time_init: unable to attach IRQ%d\n", printk(KERN_ERR "leon_time_init: unable to attach IRQ%d\n",
LEON_INTERRUPT_TIMER1); LEON_INTERRUPT_TIMER1);
prom_halt(); prom_halt();
...@@ -347,12 +393,8 @@ void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu) ...@@ -347,12 +393,8 @@ void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu)
void __init leon_init_IRQ(void) void __init leon_init_IRQ(void)
{ {
sparc_irq_config.init_timers = leon_init_timers; sparc_irq_config.init_timers = leon_init_timers;
sparc_irq_config.build_device_irq = leon_build_device_irq;
BTFIXUPSET_CALL(enable_irq, leon_enable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(disable_irq, leon_disable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(enable_pil_irq, leon_enable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(disable_pil_irq, leon_disable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(clear_clock_irq, leon_clear_clock_irq, BTFIXUPSET_CALL(clear_clock_irq, leon_clear_clock_irq,
BTFIXUPCALL_NORM); BTFIXUPCALL_NORM);
......
...@@ -164,6 +164,9 @@ void __iomem *pcic_regs; ...@@ -164,6 +164,9 @@ void __iomem *pcic_regs;
volatile int pcic_speculative; volatile int pcic_speculative;
volatile int pcic_trapped; volatile int pcic_trapped;
/* forward */
unsigned int pcic_build_device_irq(struct platform_device *op,
unsigned int real_irq);
#define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3)) #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3))
...@@ -523,6 +526,7 @@ static void ...@@ -523,6 +526,7 @@ static void
pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node) pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node)
{ {
struct pcic_ca2irq *p; struct pcic_ca2irq *p;
unsigned int real_irq;
int i, ivec; int i, ivec;
char namebuf[64]; char namebuf[64];
...@@ -551,26 +555,25 @@ pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node) ...@@ -551,26 +555,25 @@ pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node)
i = p->pin; i = p->pin;
if (i >= 0 && i < 4) { if (i >= 0 && i < 4) {
ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO); ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
dev->irq = ivec >> (i << 2) & 0xF; real_irq = ivec >> (i << 2) & 0xF;
} else if (i >= 4 && i < 8) { } else if (i >= 4 && i < 8) {
ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI); ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
dev->irq = ivec >> ((i-4) << 2) & 0xF; real_irq = ivec >> ((i-4) << 2) & 0xF;
} else { /* Corrupted map */ } else { /* Corrupted map */
printk("PCIC: BAD PIN %d\n", i); for (;;) {} printk("PCIC: BAD PIN %d\n", i); for (;;) {}
} }
/* P3 */ /* printk("PCIC: device %s pin %d ivec 0x%x irq %x\n", namebuf, i, ivec, dev->irq); */ /* P3 */ /* printk("PCIC: device %s pin %d ivec 0x%x irq %x\n", namebuf, i, ivec, dev->irq); */
/* /* real_irq means PROM did not bother to program the upper
* dev->irq=0 means PROM did not bother to program the upper
* half of PCIC. This happens on JS-E with PROM 3.11, for instance. * half of PCIC. This happens on JS-E with PROM 3.11, for instance.
*/ */
if (dev->irq == 0 || p->force) { if (real_irq == 0 || p->force) {
if (p->irq == 0 || p->irq >= 15) { /* Corrupted map */ if (p->irq == 0 || p->irq >= 15) { /* Corrupted map */
printk("PCIC: BAD IRQ %d\n", p->irq); for (;;) {} printk("PCIC: BAD IRQ %d\n", p->irq); for (;;) {}
} }
printk("PCIC: setting irq %d at pin %d for device %02x:%02x\n", printk("PCIC: setting irq %d at pin %d for device %02x:%02x\n",
p->irq, p->pin, dev->bus->number, dev->devfn); p->irq, p->pin, dev->bus->number, dev->devfn);
dev->irq = p->irq; real_irq = p->irq;
i = p->pin; i = p->pin;
if (i >= 4) { if (i >= 4) {
...@@ -584,7 +587,8 @@ pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node) ...@@ -584,7 +587,8 @@ pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node)
ivec |= p->irq << (i << 2); ivec |= p->irq << (i << 2);
writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_LO); writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_LO);
} }
} }
dev->irq = pcic_build_device_irq(NULL, real_irq);
} }
/* /*
...@@ -729,6 +733,7 @@ void __init pci_time_init(void) ...@@ -729,6 +733,7 @@ void __init pci_time_init(void)
struct linux_pcic *pcic = &pcic0; struct linux_pcic *pcic = &pcic0;
unsigned long v; unsigned long v;
int timer_irq, irq; int timer_irq, irq;
int err;
do_arch_gettimeoffset = pci_gettimeoffset; do_arch_gettimeoffset = pci_gettimeoffset;
...@@ -740,9 +745,10 @@ void __init pci_time_init(void) ...@@ -740,9 +745,10 @@ void __init pci_time_init(void)
timer_irq = PCI_COUNTER_IRQ_SYS(v); timer_irq = PCI_COUNTER_IRQ_SYS(v);
writel (PCI_COUNTER_IRQ_SET(timer_irq, 0), writel (PCI_COUNTER_IRQ_SET(timer_irq, 0),
pcic->pcic_regs+PCI_COUNTER_IRQ); pcic->pcic_regs+PCI_COUNTER_IRQ);
irq = request_irq(timer_irq, pcic_timer_handler, irq = pcic_build_device_irq(NULL, timer_irq);
(IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL); err = request_irq(irq, pcic_timer_handler,
if (irq) { IRQF_TIMER, "timer", NULL);
if (err) {
prom_printf("time_init: unable to attach IRQ%d\n", timer_irq); prom_printf("time_init: unable to attach IRQ%d\n", timer_irq);
prom_halt(); prom_halt();
} }
...@@ -803,50 +809,73 @@ static inline unsigned long get_irqmask(int irq_nr) ...@@ -803,50 +809,73 @@ static inline unsigned long get_irqmask(int irq_nr)
return 1 << irq_nr; return 1 << irq_nr;
} }
static void pcic_disable_irq(unsigned int irq_nr) static void pcic_mask_irq(struct irq_data *data)
{ {
unsigned long mask, flags; unsigned long mask, flags;
mask = get_irqmask(irq_nr); mask = (unsigned long)data->chip_data;
local_irq_save(flags); local_irq_save(flags);
writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET); writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET);
local_irq_restore(flags); local_irq_restore(flags);
} }
static void pcic_enable_irq(unsigned int irq_nr) static void pcic_unmask_irq(struct irq_data *data)
{ {
unsigned long mask, flags; unsigned long mask, flags;
mask = get_irqmask(irq_nr); mask = (unsigned long)data->chip_data;
local_irq_save(flags); local_irq_save(flags);
writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR); writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR);
local_irq_restore(flags); local_irq_restore(flags);
} }
static void pcic_load_profile_irq(int cpu, unsigned int limit) static unsigned int pcic_startup_irq(struct irq_data *data)
{ {
printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__); irq_link(data->irq);
pcic_unmask_irq(data);
return 0;
} }
/* We assume the caller has disabled local interrupts when these are called, static struct irq_chip pcic_irq = {
* or else very bizarre behavior will result. .name = "pcic",
*/ .irq_startup = pcic_startup_irq,
static void pcic_disable_pil_irq(unsigned int pil) .irq_mask = pcic_mask_irq,
.irq_unmask = pcic_unmask_irq,
};
unsigned int pcic_build_device_irq(struct platform_device *op,
unsigned int real_irq)
{ {
writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET); unsigned int irq;
unsigned long mask;
irq = 0;
mask = get_irqmask(real_irq);
if (mask == 0)
goto out;
irq = irq_alloc(real_irq, real_irq);
if (irq == 0)
goto out;
irq_set_chip_and_handler_name(irq, &pcic_irq,
handle_level_irq, "PCIC");
irq_set_chip_data(irq, (void *)mask);
out:
return irq;
} }
static void pcic_enable_pil_irq(unsigned int pil)
static void pcic_load_profile_irq(int cpu, unsigned int limit)
{ {
writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR); printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__);
} }
void __init sun4m_pci_init_IRQ(void) void __init sun4m_pci_init_IRQ(void)
{ {
BTFIXUPSET_CALL(enable_irq, pcic_enable_irq, BTFIXUPCALL_NORM); sparc_irq_config.build_device_irq = pcic_build_device_irq;
BTFIXUPSET_CALL(disable_irq, pcic_disable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(enable_pil_irq, pcic_enable_pil_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(disable_pil_irq, pcic_disable_pil_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM);
} }
......
...@@ -65,62 +65,94 @@ ...@@ -65,62 +65,94 @@
*/ */
unsigned char __iomem *interrupt_enable; unsigned char __iomem *interrupt_enable;
static void sun4c_disable_irq(unsigned int irq_nr) static void sun4c_mask_irq(struct irq_data *data)
{ {
unsigned long flags; unsigned long mask = (unsigned long)data->chip_data;
unsigned char current_mask, new_mask;
if (mask) {
local_irq_save(flags); unsigned long flags;
irq_nr &= (NR_IRQS - 1);
current_mask = sbus_readb(interrupt_enable); local_irq_save(flags);
switch (irq_nr) { mask = sbus_readb(interrupt_enable) & ~mask;
case 1: sbus_writeb(mask, interrupt_enable);
new_mask = ((current_mask) & (~(SUN4C_INT_E1)));
break;
case 8:
new_mask = ((current_mask) & (~(SUN4C_INT_E8)));
break;
case 10:
new_mask = ((current_mask) & (~(SUN4C_INT_E10)));
break;
case 14:
new_mask = ((current_mask) & (~(SUN4C_INT_E14)));
break;
default:
local_irq_restore(flags); local_irq_restore(flags);
return;
} }
sbus_writeb(new_mask, interrupt_enable);
local_irq_restore(flags);
} }
static void sun4c_enable_irq(unsigned int irq_nr) static void sun4c_unmask_irq(struct irq_data *data)
{ {
unsigned long flags; unsigned long mask = (unsigned long)data->chip_data;
unsigned char current_mask, new_mask;
if (mask) {
local_irq_save(flags); unsigned long flags;
irq_nr &= (NR_IRQS - 1);
current_mask = sbus_readb(interrupt_enable); local_irq_save(flags);
switch (irq_nr) { mask = sbus_readb(interrupt_enable) | mask;
case 1: sbus_writeb(mask, interrupt_enable);
new_mask = ((current_mask) | SUN4C_INT_E1);
break;
case 8:
new_mask = ((current_mask) | SUN4C_INT_E8);
break;
case 10:
new_mask = ((current_mask) | SUN4C_INT_E10);
break;
case 14:
new_mask = ((current_mask) | SUN4C_INT_E14);
break;
default:
local_irq_restore(flags); local_irq_restore(flags);
return;
} }
sbus_writeb(new_mask, interrupt_enable); }
local_irq_restore(flags);
static unsigned int sun4c_startup_irq(struct irq_data *data)
{
irq_link(data->irq);
sun4c_unmask_irq(data);
return 0;
}
static void sun4c_shutdown_irq(struct irq_data *data)
{
sun4c_mask_irq(data);
irq_unlink(data->irq);
}
static struct irq_chip sun4c_irq = {
.name = "sun4c",
.irq_startup = sun4c_startup_irq,
.irq_shutdown = sun4c_shutdown_irq,
.irq_mask = sun4c_mask_irq,
.irq_unmask = sun4c_unmask_irq,
};
static unsigned int sun4c_build_device_irq(struct platform_device *op,
unsigned int real_irq)
{
unsigned int irq;
if (real_irq >= 16) {
prom_printf("Bogus sun4c IRQ %u\n", real_irq);
prom_halt();
}
irq = irq_alloc(real_irq, real_irq);
if (irq) {
unsigned long mask = 0UL;
switch (real_irq) {
case 1:
mask = SUN4C_INT_E1;
break;
case 8:
mask = SUN4C_INT_E8;
break;
case 10:
mask = SUN4C_INT_E10;
break;
case 14:
mask = SUN4C_INT_E14;
break;
default:
/* All the rest are either always enabled,
* or are for signalling software interrupts.
*/
break;
}
irq_set_chip_and_handler_name(irq, &sun4c_irq,
handle_level_irq, "level");
irq_set_chip_data(irq, (void *)mask);
}
return irq;
} }
struct sun4c_timer_info { struct sun4c_timer_info {
...@@ -144,8 +176,9 @@ static void sun4c_load_profile_irq(int cpu, unsigned int limit) ...@@ -144,8 +176,9 @@ static void sun4c_load_profile_irq(int cpu, unsigned int limit)
static void __init sun4c_init_timers(irq_handler_t counter_fn) static void __init sun4c_init_timers(irq_handler_t counter_fn)
{ {
const struct linux_prom_irqs *irq; const struct linux_prom_irqs *prom_irqs;
struct device_node *dp; struct device_node *dp;
unsigned int irq;
const u32 *addr; const u32 *addr;
int err; int err;
...@@ -163,9 +196,9 @@ static void __init sun4c_init_timers(irq_handler_t counter_fn) ...@@ -163,9 +196,9 @@ static void __init sun4c_init_timers(irq_handler_t counter_fn)
sun4c_timers = (void __iomem *) (unsigned long) addr[0]; sun4c_timers = (void __iomem *) (unsigned long) addr[0];
irq = of_get_property(dp, "intr", NULL); prom_irqs = of_get_property(dp, "intr", NULL);
of_node_put(dp); of_node_put(dp);
if (!irq) { if (!prom_irqs) {
prom_printf("sun4c_init_timers: No intr property\n"); prom_printf("sun4c_init_timers: No intr property\n");
prom_halt(); prom_halt();
} }
...@@ -178,15 +211,15 @@ static void __init sun4c_init_timers(irq_handler_t counter_fn) ...@@ -178,15 +211,15 @@ static void __init sun4c_init_timers(irq_handler_t counter_fn)
master_l10_counter = &sun4c_timers->l10_count; master_l10_counter = &sun4c_timers->l10_count;
err = request_irq(irq[0].pri, counter_fn, irq = sun4c_build_device_irq(NULL, prom_irqs[0].pri);
(IRQF_DISABLED | SA_STATIC_ALLOC), err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL);
"timer", NULL);
if (err) { if (err) {
prom_printf("sun4c_init_timers: request_irq() fails with %d\n", err); prom_printf("sun4c_init_timers: request_irq() fails with %d\n", err);
prom_halt(); prom_halt();
} }
sun4c_disable_irq(irq[1].pri); /* disable timer interrupt */
sun4c_mask_irq(irq_get_irq_data(irq));
} }
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
...@@ -215,14 +248,11 @@ void __init sun4c_init_IRQ(void) ...@@ -215,14 +248,11 @@ void __init sun4c_init_IRQ(void)
interrupt_enable = (void __iomem *) (unsigned long) addr[0]; interrupt_enable = (void __iomem *) (unsigned long) addr[0];
BTFIXUPSET_CALL(enable_irq, sun4c_enable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(disable_irq, sun4c_disable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(enable_pil_irq, sun4c_enable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(disable_pil_irq, sun4c_disable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP); BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP);
sparc_irq_config.init_timers = sun4c_init_timers; sparc_irq_config.init_timers = sun4c_init_timers;
sparc_irq_config.build_device_irq = sun4c_build_device_irq;
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP); BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);
......
This diff is collapsed.
...@@ -100,6 +100,11 @@ ...@@ -100,6 +100,11 @@
struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS]; struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS];
struct sun4m_irq_global __iomem *sun4m_irq_global; struct sun4m_irq_global __iomem *sun4m_irq_global;
struct sun4m_handler_data {
bool percpu;
long mask;
};
/* Dave Redman (djhr@tadpole.co.uk) /* Dave Redman (djhr@tadpole.co.uk)
* The sun4m interrupt registers. * The sun4m interrupt registers.
*/ */
...@@ -142,9 +147,9 @@ struct sun4m_irq_global __iomem *sun4m_irq_global; ...@@ -142,9 +147,9 @@ struct sun4m_irq_global __iomem *sun4m_irq_global;
#define OBP_INT_LEVEL_VME 0x40 #define OBP_INT_LEVEL_VME 0x40
#define SUN4M_TIMER_IRQ (OBP_INT_LEVEL_ONBOARD | 10) #define SUN4M_TIMER_IRQ (OBP_INT_LEVEL_ONBOARD | 10)
#define SUM4M_PROFILE_IRQ (OBP_INT_LEVEL_ONBOARD | 14) #define SUN4M_PROFILE_IRQ (OBP_INT_LEVEL_ONBOARD | 14)
static unsigned long irq_mask[0x50] = { static unsigned long sun4m_imask[0x50] = {
/* 0x00 - SMP */ /* 0x00 - SMP */
0, SUN4M_SOFT_INT(1), 0, SUN4M_SOFT_INT(1),
SUN4M_SOFT_INT(2), SUN4M_SOFT_INT(3), SUN4M_SOFT_INT(2), SUN4M_SOFT_INT(3),
...@@ -169,7 +174,7 @@ static unsigned long irq_mask[0x50] = { ...@@ -169,7 +174,7 @@ static unsigned long irq_mask[0x50] = {
SUN4M_INT_VIDEO, SUN4M_INT_MODULE, SUN4M_INT_VIDEO, SUN4M_INT_MODULE,
SUN4M_INT_REALTIME, SUN4M_INT_FLOPPY, SUN4M_INT_REALTIME, SUN4M_INT_FLOPPY,
(SUN4M_INT_SERIAL | SUN4M_INT_KBDMS), (SUN4M_INT_SERIAL | SUN4M_INT_KBDMS),
SUN4M_INT_AUDIO, 0, SUN4M_INT_MODULE_ERR, SUN4M_INT_AUDIO, SUN4M_INT_E14, SUN4M_INT_MODULE_ERR,
/* 0x30 - sbus */ /* 0x30 - sbus */
0, 0, SUN4M_INT_SBUS(0), SUN4M_INT_SBUS(1), 0, 0, SUN4M_INT_SBUS(0), SUN4M_INT_SBUS(1),
0, SUN4M_INT_SBUS(2), 0, SUN4M_INT_SBUS(3), 0, SUN4M_INT_SBUS(2), 0, SUN4M_INT_SBUS(3),
...@@ -182,105 +187,110 @@ static unsigned long irq_mask[0x50] = { ...@@ -182,105 +187,110 @@ static unsigned long irq_mask[0x50] = {
0, SUN4M_INT_VME(6), 0, 0 0, SUN4M_INT_VME(6), 0, 0
}; };
static unsigned long sun4m_get_irqmask(unsigned int irq) static void sun4m_mask_irq(struct irq_data *data)
{ {
unsigned long mask; struct sun4m_handler_data *handler_data = data->handler_data;
int cpu = smp_processor_id();
if (irq < 0x50)
mask = irq_mask[irq];
else
mask = 0;
if (!mask) if (handler_data->mask) {
printk(KERN_ERR "sun4m_get_irqmask: IRQ%d has no valid mask!\n", unsigned long flags;
irq);
return mask; local_irq_save(flags);
if (handler_data->percpu) {
sbus_writel(handler_data->mask, &sun4m_irq_percpu[cpu]->set);
} else {
sbus_writel(handler_data->mask, &sun4m_irq_global->mask_set);
}
local_irq_restore(flags);
}
} }
static void sun4m_disable_irq(unsigned int irq_nr) static void sun4m_unmask_irq(struct irq_data *data)
{ {
unsigned long mask, flags; struct sun4m_handler_data *handler_data = data->handler_data;
int cpu = smp_processor_id(); int cpu = smp_processor_id();
mask = sun4m_get_irqmask(irq_nr); if (handler_data->mask) {
local_irq_save(flags); unsigned long flags;
if (irq_nr > 15)
sbus_writel(mask, &sun4m_irq_global->mask_set);
else
sbus_writel(mask, &sun4m_irq_percpu[cpu]->set);
local_irq_restore(flags);
}
static void sun4m_enable_irq(unsigned int irq_nr)
{
unsigned long mask, flags;
int cpu = smp_processor_id();
/* Dreadful floppy hack. When we use 0x2b instead of
* 0x0b the system blows (it starts to whistle!).
* So we continue to use 0x0b. Fixme ASAP. --P3
*/
if (irq_nr != 0x0b) {
mask = sun4m_get_irqmask(irq_nr);
local_irq_save(flags);
if (irq_nr > 15)
sbus_writel(mask, &sun4m_irq_global->mask_clear);
else
sbus_writel(mask, &sun4m_irq_percpu[cpu]->clear);
local_irq_restore(flags);
} else {
local_irq_save(flags); local_irq_save(flags);
sbus_writel(SUN4M_INT_FLOPPY, &sun4m_irq_global->mask_clear); if (handler_data->percpu) {
sbus_writel(handler_data->mask, &sun4m_irq_percpu[cpu]->clear);
} else {
sbus_writel(handler_data->mask, &sun4m_irq_global->mask_clear);
}
local_irq_restore(flags); local_irq_restore(flags);
} }
} }
static unsigned long cpu_pil_to_imask[16] = { static unsigned int sun4m_startup_irq(struct irq_data *data)
/*0*/ 0x00000000, {
/*1*/ 0x00000000, irq_link(data->irq);
/*2*/ SUN4M_INT_SBUS(0) | SUN4M_INT_VME(0), sun4m_unmask_irq(data);
/*3*/ SUN4M_INT_SBUS(1) | SUN4M_INT_VME(1), return 0;
/*4*/ SUN4M_INT_SCSI, }
/*5*/ SUN4M_INT_SBUS(2) | SUN4M_INT_VME(2),
/*6*/ SUN4M_INT_ETHERNET,
/*7*/ SUN4M_INT_SBUS(3) | SUN4M_INT_VME(3),
/*8*/ SUN4M_INT_VIDEO,
/*9*/ SUN4M_INT_SBUS(4) | SUN4M_INT_VME(4) | SUN4M_INT_MODULE_ERR,
/*10*/ SUN4M_INT_REALTIME,
/*11*/ SUN4M_INT_SBUS(5) | SUN4M_INT_VME(5) | SUN4M_INT_FLOPPY,
/*12*/ SUN4M_INT_SERIAL | SUN4M_INT_KBDMS,
/*13*/ SUN4M_INT_SBUS(6) | SUN4M_INT_VME(6) | SUN4M_INT_AUDIO,
/*14*/ SUN4M_INT_E14,
/*15*/ SUN4M_INT_ERROR,
};
/* We assume the caller has disabled local interrupts when these are called, static void sun4m_shutdown_irq(struct irq_data *data)
* or else very bizarre behavior will result.
*/
static void sun4m_disable_pil_irq(unsigned int pil)
{ {
sbus_writel(cpu_pil_to_imask[pil], &sun4m_irq_global->mask_set); sun4m_mask_irq(data);
irq_unlink(data->irq);
} }
static void sun4m_enable_pil_irq(unsigned int pil) static struct irq_chip sun4m_irq = {
.name = "sun4m",
.irq_startup = sun4m_startup_irq,
.irq_shutdown = sun4m_shutdown_irq,
.irq_mask = sun4m_mask_irq,
.irq_unmask = sun4m_unmask_irq,
};
static unsigned int sun4m_build_device_irq(struct platform_device *op,
unsigned int real_irq)
{ {
sbus_writel(cpu_pil_to_imask[pil], &sun4m_irq_global->mask_clear); struct sun4m_handler_data *handler_data;
unsigned int irq;
unsigned int pil;
if (real_irq >= OBP_INT_LEVEL_VME) {
prom_printf("Bogus sun4m IRQ %u\n", real_irq);
prom_halt();
}
pil = (real_irq & 0xf);
irq = irq_alloc(real_irq, pil);
if (irq == 0)
goto out;
handler_data = irq_get_handler_data(irq);
if (unlikely(handler_data))
goto out;
handler_data = kzalloc(sizeof(struct sun4m_handler_data), GFP_ATOMIC);
if (unlikely(!handler_data)) {
prom_printf("IRQ: kzalloc(sun4m_handler_data) failed.\n");
prom_halt();
}
handler_data->mask = sun4m_imask[real_irq];
handler_data->percpu = real_irq < OBP_INT_LEVEL_ONBOARD;
irq_set_chip_and_handler_name(irq, &sun4m_irq,
handle_level_irq, "level");
irq_set_handler_data(irq, handler_data);
out:
return irq;
} }
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
static void sun4m_send_ipi(int cpu, int level) static void sun4m_send_ipi(int cpu, int level)
{ {
unsigned long mask = sun4m_get_irqmask(level); sbus_writel(SUN4M_SOFT_INT(level), &sun4m_irq_percpu[cpu]->set);
sbus_writel(mask, &sun4m_irq_percpu[cpu]->set);
} }
static void sun4m_clear_ipi(int cpu, int level) static void sun4m_clear_ipi(int cpu, int level)
{ {
unsigned long mask = sun4m_get_irqmask(level); sbus_writel(SUN4M_SOFT_INT(level), &sun4m_irq_percpu[cpu]->clear);
sbus_writel(mask, &sun4m_irq_percpu[cpu]->clear);
} }
static void sun4m_set_udt(int cpu) static void sun4m_set_udt(int cpu)
...@@ -343,7 +353,15 @@ void sun4m_nmi(struct pt_regs *regs) ...@@ -343,7 +353,15 @@ void sun4m_nmi(struct pt_regs *regs)
prom_halt(); prom_halt();
} }
/* Exported for sun4m_smp.c */ void sun4m_unmask_profile_irq(void)
{
unsigned long flags;
local_irq_save(flags);
sbus_writel(sun4m_imask[SUN4M_PROFILE_IRQ], &sun4m_irq_global->mask_clear);
local_irq_restore(flags);
}
void sun4m_clear_profile_irq(int cpu) void sun4m_clear_profile_irq(int cpu)
{ {
sbus_readl(&timers_percpu[cpu]->l14_limit); sbus_readl(&timers_percpu[cpu]->l14_limit);
...@@ -358,6 +376,7 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn) ...@@ -358,6 +376,7 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn)
{ {
struct device_node *dp = of_find_node_by_name(NULL, "counter"); struct device_node *dp = of_find_node_by_name(NULL, "counter");
int i, err, len, num_cpu_timers; int i, err, len, num_cpu_timers;
unsigned int irq;
const u32 *addr; const u32 *addr;
if (!dp) { if (!dp) {
...@@ -384,8 +403,9 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn) ...@@ -384,8 +403,9 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn)
master_l10_counter = &timers_global->l10_count; master_l10_counter = &timers_global->l10_count;
err = request_irq(SUN4M_TIMER_IRQ, counter_fn, irq = sun4m_build_device_irq(NULL, SUN4M_TIMER_IRQ);
(IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL);
err = request_irq(irq, counter_fn, IRQF_TIMER, "timer", NULL);
if (err) { if (err) {
printk(KERN_ERR "sun4m_init_timers: Register IRQ error %d.\n", printk(KERN_ERR "sun4m_init_timers: Register IRQ error %d.\n",
err); err);
...@@ -452,14 +472,11 @@ void __init sun4m_init_IRQ(void) ...@@ -452,14 +472,11 @@ void __init sun4m_init_IRQ(void)
if (num_cpu_iregs == 4) if (num_cpu_iregs == 4)
sbus_writel(0, &sun4m_irq_global->interrupt_target); sbus_writel(0, &sun4m_irq_global->interrupt_target);
BTFIXUPSET_CALL(enable_irq, sun4m_enable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(disable_irq, sun4m_disable_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(enable_pil_irq, sun4m_enable_pil_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(disable_pil_irq, sun4m_disable_pil_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(clear_clock_irq, sun4m_clear_clock_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(clear_clock_irq, sun4m_clear_clock_irq, BTFIXUPCALL_NORM);
BTFIXUPSET_CALL(load_profile_irq, sun4m_load_profile_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(load_profile_irq, sun4m_load_profile_irq, BTFIXUPCALL_NORM);
sparc_irq_config.init_timers = sun4m_init_timers; sparc_irq_config.init_timers = sun4m_init_timers;
sparc_irq_config.build_device_irq = sun4m_build_device_irq;
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
BTFIXUPSET_CALL(set_cpu_int, sun4m_send_ipi, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(set_cpu_int, sun4m_send_ipi, BTFIXUPCALL_NORM);
......
...@@ -150,20 +150,6 @@ void __init smp4m_smp_done(void) ...@@ -150,20 +150,6 @@ void __init smp4m_smp_done(void)
/* Ok, they are spinning and ready to go. */ /* Ok, they are spinning and ready to go. */
} }
/* At each hardware IRQ, we get this called to forward IRQ reception
* to the next processor. The caller must disable the IRQ level being
* serviced globally so that there are no double interrupts received.
*
* XXX See sparc64 irq.c.
*/
void smp4m_irq_rotate(int cpu)
{
int next = cpu_data(cpu).next;
if (next != cpu)
set_irq_udt(next);
}
static struct smp_funcall { static struct smp_funcall {
smpfunc_t func; smpfunc_t func;
unsigned long arg1; unsigned long arg1;
...@@ -277,7 +263,7 @@ static void __cpuinit smp_setup_percpu_timer(void) ...@@ -277,7 +263,7 @@ static void __cpuinit smp_setup_percpu_timer(void)
load_profile_irq(cpu, lvl14_resolution); load_profile_irq(cpu, lvl14_resolution);
if (cpu == boot_cpu_id) if (cpu == boot_cpu_id)
enable_pil_irq(14); sun4m_unmask_profile_irq();
} }
static void __init smp4m_blackbox_id(unsigned *addr) static void __init smp4m_blackbox_id(unsigned *addr)
......
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