Commit 6c1f40ef authored by Paul Mundt's avatar Paul Mundt Committed by Linus Torvalds

[PATCH] sh: CTP/PCI-SH03 board support

This adds support for the CTP/PCI-SH03 board from Interface.
Signed-off-by: default avatarSaito.K <ksaito@interface.co.jp>
Signed-off-by: default avatarPaul Mundt <paul.mundt@nokia.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent d14cb201
#
# Makefile for the Interface (CTP/PCI-SH03) specific parts of the kernel
#
obj-y := setup.o rtc.o
obj-$(CONFIG_HEARTBEAT) += led.o
/*
* linux/arch/sh/boards/sh03/led.c
*
* Copyright (C) 2004 Saito.K Interface Corporation.
*
* This file contains Interface CTP/PCI-SH03 specific LED code.
*/
#include <linux/config.h>
#include <linux/sched.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_sh03(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned char* p = (volatile unsigned char*)0xa0800000;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ( (300<<FSHIFT)/
((avenrun[0]/5) + (3<<FSHIFT)) );
if (up) {
if (bit == 7) {
bit--;
up=0;
} else {
bit ++;
}
} else {
if (bit == 0) {
bit++;
up=1;
} else {
bit--;
}
}
*p = 1<<bit;
}
/*
* linux/arch/sh/boards/sh03/rtc.c -- CTP/PCI-SH03 on-chip RTC support
*
* Copyright (C) 2004 Saito.K & Jeanne(ksaito@interface.co.jp)
*
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <asm/io.h>
#include <linux/rtc.h>
#include <linux/spinlock.h>
#define RTC_BASE 0xb0000000
#define RTC_SEC1 (RTC_BASE + 0)
#define RTC_SEC10 (RTC_BASE + 1)
#define RTC_MIN1 (RTC_BASE + 2)
#define RTC_MIN10 (RTC_BASE + 3)
#define RTC_HOU1 (RTC_BASE + 4)
#define RTC_HOU10 (RTC_BASE + 5)
#define RTC_WEE1 (RTC_BASE + 6)
#define RTC_DAY1 (RTC_BASE + 7)
#define RTC_DAY10 (RTC_BASE + 8)
#define RTC_MON1 (RTC_BASE + 9)
#define RTC_MON10 (RTC_BASE + 10)
#define RTC_YEA1 (RTC_BASE + 11)
#define RTC_YEA10 (RTC_BASE + 12)
#define RTC_YEA100 (RTC_BASE + 13)
#define RTC_YEA1000 (RTC_BASE + 14)
#define RTC_CTL (RTC_BASE + 15)
#define RTC_BUSY 1
#define RTC_STOP 2
#ifndef BCD_TO_BIN
#define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
#endif
#ifndef BIN_TO_BCD
#define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10)
#endif
extern void (*rtc_get_time)(struct timespec *);
extern int (*rtc_set_time)(const time_t);
extern spinlock_t rtc_lock;
unsigned long get_cmos_time(void)
{
unsigned int year, mon, day, hour, min, sec;
int i;
spin_lock(&rtc_lock);
again:
for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
if (!(ctrl_inb(RTC_CTL) & RTC_BUSY))
break;
do {
sec = (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10;
min = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10;
hour = (ctrl_inb(RTC_HOU1) & 0xf) + (ctrl_inb(RTC_HOU10) & 0xf) * 10;
day = (ctrl_inb(RTC_DAY1) & 0xf) + (ctrl_inb(RTC_DAY10) & 0xf) * 10;
mon = (ctrl_inb(RTC_MON1) & 0xf) + (ctrl_inb(RTC_MON10) & 0xf) * 10;
year = (ctrl_inb(RTC_YEA1) & 0xf) + (ctrl_inb(RTC_YEA10) & 0xf) * 10
+ (ctrl_inb(RTC_YEA100 ) & 0xf) * 100
+ (ctrl_inb(RTC_YEA1000) & 0xf) * 1000;
} while (sec != (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10);
if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
hour > 23 || min > 59 || sec > 59) {
printk(KERN_ERR
"SH-03 RTC: invalid value, resetting to 1 Jan 2000\n");
printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n",
year, mon, day, hour, min, sec);
ctrl_outb(0, RTC_SEC1); ctrl_outb(0, RTC_SEC10);
ctrl_outb(0, RTC_MIN1); ctrl_outb(0, RTC_MIN10);
ctrl_outb(0, RTC_HOU1); ctrl_outb(0, RTC_HOU10);
ctrl_outb(6, RTC_WEE1);
ctrl_outb(1, RTC_DAY1); ctrl_outb(0, RTC_DAY10);
ctrl_outb(1, RTC_MON1); ctrl_outb(0, RTC_MON10);
ctrl_outb(0, RTC_YEA1); ctrl_outb(0, RTC_YEA10);
ctrl_outb(0, RTC_YEA100);
ctrl_outb(2, RTC_YEA1000);
ctrl_outb(0, RTC_CTL);
goto again;
}
spin_unlock(&rtc_lock);
return mktime(year, mon, day, hour, min, sec);
}
void sh03_rtc_gettimeofday(struct timespec *tv)
{
tv->tv_sec = get_cmos_time();
tv->tv_nsec = 0;
}
static int set_rtc_mmss(unsigned long nowtime)
{
int retval = 0;
int real_seconds, real_minutes, cmos_minutes;
int i;
/* gets recalled with irq locally disabled */
spin_lock(&rtc_lock);
for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
if (!(ctrl_inb(RTC_CTL) & RTC_BUSY))
break;
cmos_minutes = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10;
real_seconds = nowtime % 60;
real_minutes = nowtime / 60;
if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
real_minutes += 30; /* correct for half hour time zone */
real_minutes %= 60;
if (abs(real_minutes - cmos_minutes) < 30) {
BIN_TO_BCD(real_seconds);
BIN_TO_BCD(real_minutes);
ctrl_outb(real_seconds % 10, RTC_SEC1);
ctrl_outb(real_seconds / 10, RTC_SEC10);
ctrl_outb(real_minutes % 10, RTC_MIN1);
ctrl_outb(real_minutes / 10, RTC_MIN10);
} else {
printk(KERN_WARNING
"set_rtc_mmss: can't update from %d to %d\n",
cmos_minutes, real_minutes);
retval = -1;
}
spin_unlock(&rtc_lock);
return retval;
}
int sh03_rtc_settimeofday(const time_t secs)
{
unsigned long nowtime = secs;
return set_rtc_mmss(nowtime);
}
void sh03_time_init(void)
{
rtc_get_time = sh03_rtc_gettimeofday;
rtc_set_time = sh03_rtc_settimeofday;
}
/*
* linux/arch/sh/boards/sh03/setup.c
*
* Copyright (C) 2004 Interface Co.,Ltd. Saito.K
*
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <asm/io.h>
#include <asm/sh03/io.h>
#include <asm/sh03/sh03.h>
#include <asm/addrspace.h>
#include "../../drivers/pci/pci-sh7751.h"
extern void (*board_time_init)(void);
const char *get_system_type(void)
{
return "Interface CTP/PCI-SH03)";
}
void init_sh03_IRQ(void)
{
ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
make_ipr_irq(IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY);
make_ipr_irq(IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY);
make_ipr_irq(IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY);
make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
}
extern void *cf_io_base;
unsigned long sh03_isa_port2addr(unsigned long port)
{
if (PXSEG(port))
return port;
/* CompactFlash (IDE) */
if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6)) {
return (unsigned long)cf_io_base + port;
}
return port + SH7751_PCI_IO_BASE;
}
/*
* The Machine Vector
*/
struct sh_machine_vector mv_sh03 __initmv = {
.mv_nr_irqs = 48,
.mv_isa_port2addr = sh03_isa_port2addr,
.mv_init_irq = init_sh03_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_sh03,
#endif
};
ALIAS_MV(sh03)
/* arch/sh/boards/sh03/rtc.c */
void sh03_time_init(void);
int __init platform_setup(void)
{
board_time_init = sh03_time_init;
return 0;
}
/*
* include/asm-sh/sh03/io.h
*
* Copyright 2004 Interface Co.,Ltd. Saito.K
*
* IO functions for an Interface CTP/PCI-SH03
*/
#ifndef _ASM_SH_IO_SH03_H
#define _ASM_SH_IO_SH03_H
#include <linux/time.h>
#define INTC_IPRD 0xffd00010UL
#define IRL0_IRQ 2
#define IRL0_IPR_ADDR INTC_IPRD
#define IRL0_IPR_POS 3
#define IRL0_PRIORITY 13
#define IRL1_IRQ 5
#define IRL1_IPR_ADDR INTC_IPRD
#define IRL1_IPR_POS 2
#define IRL1_PRIORITY 10
#define IRL2_IRQ 8
#define IRL2_IPR_ADDR INTC_IPRD
#define IRL2_IPR_POS 1
#define IRL2_PRIORITY 7
#define IRL3_IRQ 11
#define IRL3_IPR_ADDR INTC_IPRD
#define IRL3_IPR_POS 0
#define IRL3_PRIORITY 4
extern unsigned long sh03_isa_port2addr(unsigned long offset);
extern void setup_sh03(void);
extern void init_sh03_IRQ(void);
extern void heartbeat_sh03(void);
extern void sh03_rtc_gettimeofday(struct timeval *tv);
extern int sh03_rtc_settimeofday(const struct timeval *tv);
#endif /* _ASM_SH_IO_SH03_H */
#ifndef __ASM_SH_SH03_H
#define __ASM_SH_SH03_H
/*
* linux/include/asm-sh/sh03/sh03.h
*
* Copyright (C) 2004 Interface Co., Ltd. Saito.K
*
* Interface CTP/PCI-SH03 support
*/
#define PA_PCI_IO (0xbe240000) /* PCI I/O space */
#define PA_PCI_MEM (0xbd000000) /* PCI MEM space */
#define PCIPAR (0xa4000cf8) /* PCI Config address */
#define PCIPDR (0xa4000cfc) /* PCI Config data */
#endif /* __ASM_SH_SH03_H */
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