Commit 6c20c807 authored by Dimitris Papastamos's avatar Dimitris Papastamos Committed by Mark Brown

ASoC: WM8804: Power down the PLL correctly

The PLL is disabled when the corresponding bit is set not the other
way around.  This commit depends on my other commit with Subject
"ASoC: WM8804: Refactor set_pll code to avoid GCC warnings".
Signed-off-by: default avatarDimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: default avatarLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 86ce6c9a
......@@ -395,7 +395,7 @@ static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
codec = dai->codec;
if (!freq_in || !freq_out) {
/* disable the PLL */
snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0);
snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
return 0;
} else {
int ret;
......@@ -406,7 +406,7 @@ static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
return ret;
/* power down the PLL before reprogramming it */
snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0);
snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
if (!freq_in || !freq_out)
return 0;
......@@ -423,7 +423,7 @@ static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
snd_soc_write(codec, WM8804_PLL3, pll_div.k >> 16);
/* power up the PLL */
snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0);
}
return 0;
......
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