Commit 6cde23b3 authored by Biao Huang's avatar Biao Huang Committed by David S. Miller

net: ethernet: mtk-star-emac: add support for MT8365 SoC

Add Ethernet driver support for MT8365 SoC.
Signed-off-by: default avatarBiao Huang <biao.huang@mediatek.com>
Signed-off-by: default avatarYinghua Pan <ot_yinghua.pan@mediatek.com>
Signed-off-by: default avatarFabien Parent <fparent@baylibre.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9ccbfdef
...@@ -150,6 +150,7 @@ static const char *const mtk_star_clk_names[] = { "core", "reg", "trans" }; ...@@ -150,6 +150,7 @@ static const char *const mtk_star_clk_names[] = { "core", "reg", "trans" };
#define MTK_STAR_REG_MAC_CLK_CONF 0x00ac #define MTK_STAR_REG_MAC_CLK_CONF 0x00ac
#define MTK_STAR_MSK_MAC_CLK_CONF GENMASK(7, 0) #define MTK_STAR_MSK_MAC_CLK_CONF GENMASK(7, 0)
#define MTK_STAR_BIT_CLK_DIV_10 0x0a #define MTK_STAR_BIT_CLK_DIV_10 0x0a
#define MTK_STAR_BIT_CLK_DIV_50 0x32
/* Counter registers. */ /* Counter registers. */
#define MTK_STAR_REG_C_RXOKPKT 0x0100 #define MTK_STAR_REG_C_RXOKPKT 0x0100
...@@ -182,9 +183,11 @@ static const char *const mtk_star_clk_names[] = { "core", "reg", "trans" }; ...@@ -182,9 +183,11 @@ static const char *const mtk_star_clk_names[] = { "core", "reg", "trans" };
#define MTK_STAR_REG_C_RX_TWIST 0x0218 #define MTK_STAR_REG_C_RX_TWIST 0x0218
/* Ethernet CFG Control */ /* Ethernet CFG Control */
#define MTK_PERICFG_REG_NIC_CFG_CON 0x03c4 #define MTK_PERICFG_REG_NIC_CFG0_CON 0x03c4
#define MTK_PERICFG_MSK_NIC_CFG_CON_CFG_MII GENMASK(3, 0) #define MTK_PERICFG_REG_NIC_CFG1_CON 0x03c8
#define MTK_PERICFG_BIT_NIC_CFG_CON_RMII BIT(0) #define MTK_PERICFG_REG_NIC_CFG_CON_V2 0x0c10
#define MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF GENMASK(3, 0)
#define MTK_PERICFG_BIT_NIC_CFG_CON_RMII 1
/* Represents the actual structure of descriptors used by the MAC. We can /* Represents the actual structure of descriptors used by the MAC. We can
* reuse the same structure for both TX and RX - the layout is the same, only * reuse the same structure for both TX and RX - the layout is the same, only
...@@ -233,6 +236,7 @@ struct mtk_star_ring { ...@@ -233,6 +236,7 @@ struct mtk_star_ring {
}; };
struct mtk_star_compat { struct mtk_star_compat {
int (*set_interface_mode)(struct net_device *ndev);
unsigned char bit_clk_div; unsigned char bit_clk_div;
}; };
...@@ -908,13 +912,6 @@ static void mtk_star_init_config(struct mtk_star_priv *priv) ...@@ -908,13 +912,6 @@ static void mtk_star_init_config(struct mtk_star_priv *priv)
priv->compat_data->bit_clk_div); priv->compat_data->bit_clk_div);
} }
static void mtk_star_set_mode_rmii(struct mtk_star_priv *priv)
{
regmap_update_bits(priv->pericfg, MTK_PERICFG_REG_NIC_CFG_CON,
MTK_PERICFG_MSK_NIC_CFG_CON_CFG_MII,
MTK_PERICFG_BIT_NIC_CFG_CON_RMII);
}
static int mtk_star_enable(struct net_device *ndev) static int mtk_star_enable(struct net_device *ndev)
{ {
struct mtk_star_priv *priv = netdev_priv(ndev); struct mtk_star_priv *priv = netdev_priv(ndev);
...@@ -1530,7 +1527,13 @@ static int mtk_star_probe(struct platform_device *pdev) ...@@ -1530,7 +1527,13 @@ static int mtk_star_probe(struct platform_device *pdev)
return -ENODEV; return -ENODEV;
} }
mtk_star_set_mode_rmii(priv); if (priv->compat_data->set_interface_mode) {
ret = priv->compat_data->set_interface_mode(ndev);
if (ret) {
dev_err(dev, "Failed to set phy interface, err = %d\n", ret);
return -EINVAL;
}
}
ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
if (ret) { if (ret) {
...@@ -1564,10 +1567,58 @@ static int mtk_star_probe(struct platform_device *pdev) ...@@ -1564,10 +1567,58 @@ static int mtk_star_probe(struct platform_device *pdev)
} }
#ifdef CONFIG_OF #ifdef CONFIG_OF
static int mt8516_set_interface_mode(struct net_device *ndev)
{
struct mtk_star_priv *priv = netdev_priv(ndev);
struct device *dev = mtk_star_get_dev(priv);
unsigned int intf_val;
switch (priv->phy_intf) {
case PHY_INTERFACE_MODE_RMII:
intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII;
break;
default:
dev_err(dev, "This interface not supported\n");
return -EINVAL;
}
return regmap_update_bits(priv->pericfg,
MTK_PERICFG_REG_NIC_CFG0_CON,
MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF,
intf_val);
}
static int mt8365_set_interface_mode(struct net_device *ndev)
{
struct mtk_star_priv *priv = netdev_priv(ndev);
struct device *dev = mtk_star_get_dev(priv);
unsigned int intf_val;
switch (priv->phy_intf) {
case PHY_INTERFACE_MODE_RMII:
intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII;
break;
default:
dev_err(dev, "This interface not supported\n");
return -EINVAL;
}
return regmap_update_bits(priv->pericfg,
MTK_PERICFG_REG_NIC_CFG_CON_V2,
MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF,
intf_val);
}
static const struct mtk_star_compat mtk_star_mt8516_compat = { static const struct mtk_star_compat mtk_star_mt8516_compat = {
.set_interface_mode = mt8516_set_interface_mode,
.bit_clk_div = MTK_STAR_BIT_CLK_DIV_10, .bit_clk_div = MTK_STAR_BIT_CLK_DIV_10,
}; };
static const struct mtk_star_compat mtk_star_mt8365_compat = {
.set_interface_mode = mt8365_set_interface_mode,
.bit_clk_div = MTK_STAR_BIT_CLK_DIV_50,
};
static const struct of_device_id mtk_star_of_match[] = { static const struct of_device_id mtk_star_of_match[] = {
{ .compatible = "mediatek,mt8516-eth", { .compatible = "mediatek,mt8516-eth",
.data = &mtk_star_mt8516_compat }, .data = &mtk_star_mt8516_compat },
...@@ -1575,6 +1626,8 @@ static const struct of_device_id mtk_star_of_match[] = { ...@@ -1575,6 +1626,8 @@ static const struct of_device_id mtk_star_of_match[] = {
.data = &mtk_star_mt8516_compat }, .data = &mtk_star_mt8516_compat },
{ .compatible = "mediatek,mt8175-eth", { .compatible = "mediatek,mt8175-eth",
.data = &mtk_star_mt8516_compat }, .data = &mtk_star_mt8516_compat },
{ .compatible = "mediatek,mt8365-eth",
.data = &mtk_star_mt8365_compat },
{ } { }
}; };
MODULE_DEVICE_TABLE(of, mtk_star_of_match); MODULE_DEVICE_TABLE(of, mtk_star_of_match);
......
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