Commit 6dd5d3b8 authored by Alexandru Ardelean's avatar Alexandru Ardelean Committed by Ley Foon Tan

arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio'

There is no more 'altr,gpio-bank-width' in the 'altr,pio-1.0' driver.
There is a 'altr,ngpio' which is  what the property wants to configure.

This change updates all occurrences of 'altr,gpio-bank-width' to
'altr,ngpio'.
Signed-off-by: default avatarAlexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: default avatarLey Foon Tan <ley.foon.tan@intel.com>
parent f26e4331
...@@ -263,7 +263,7 @@ Overlay contains: ...@@ -263,7 +263,7 @@ Overlay contains:
gpio@10040 { gpio@10040 {
compatible = "altr,pio-1.0"; compatible = "altr,pio-1.0";
reg = <0x10040 0x20>; reg = <0x10040 0x20>;
altr,gpio-bank-width = <4>; altr,ngpio = <4>;
#gpio-cells = <2>; #gpio-cells = <2>;
clocks = <2>; clocks = <2>;
gpio-controller; gpio-controller;
...@@ -468,7 +468,7 @@ programming is the FPGA based bridge of fpga_region1. ...@@ -468,7 +468,7 @@ programming is the FPGA based bridge of fpga_region1.
compatible = "altr,pio-1.0"; compatible = "altr,pio-1.0";
reg = <0x10040 0x20>; reg = <0x10040 0x20>;
clocks = <0x2>; clocks = <0x2>;
altr,gpio-bank-width = <0x4>; altr,ngpio = <0x4>;
resetvalue = <0x0>; resetvalue = <0x0>;
#gpio-cells = <0x2>; #gpio-cells = <0x2>;
gpio-controller; gpio-controller;
......
...@@ -179,7 +179,7 @@ sys_clk_timer: timer@18001440 { ...@@ -179,7 +179,7 @@ sys_clk_timer: timer@18001440 {
led_pio: gpio@180014d0 { led_pio: gpio@180014d0 {
compatible = "altr,pio-1.0"; compatible = "altr,pio-1.0";
reg = <0x180014d0 0x00000010>; reg = <0x180014d0 0x00000010>;
altr,gpio-bank-width = <4>; altr,ngpio = <4>;
resetvalue = <15>; resetvalue = <15>;
#gpio-cells = <2>; #gpio-cells = <2>;
gpio-controller; gpio-controller;
...@@ -190,7 +190,7 @@ button_pio: gpio@180014c0 { ...@@ -190,7 +190,7 @@ button_pio: gpio@180014c0 {
reg = <0x180014c0 0x00000010>; reg = <0x180014c0 0x00000010>;
interrupt-parent = <&cpu>; interrupt-parent = <&cpu>;
interrupts = <6>; interrupts = <6>;
altr,gpio-bank-width = <3>; altr,ngpio = <3>;
altr,interrupt-type = <2>; altr,interrupt-type = <2>;
edge_type = <1>; edge_type = <1>;
level_trigger = <0>; level_trigger = <0>;
......
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