Commit 6de4682d authored by Jani Nikula's avatar Jani Nikula Committed by Greg Kroah-Hartman

drm/i915/dp: fall back to 18 bpp when sink capability is unknown

commit 5efd4076 upstream.

Per DP spec, the source device should fall back to 18 bpp, VESA range
RGB when the sink capability is unknown. Fix the color depth
clamping. 18 bpp color depth should ensure full color range in automatic
mode.

The clamping has been HDMI specific since its introduction in

commit 996a2239
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Apr 19 11:24:34 2013 +0200

    drm/i915: Disable high-bpc on pre-1.4 EDID screens
Reported-and-tested-by: default avatarDihan Wickremasuriya <nayomal@gmail.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=105331Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1452695720-7076-1-git-send-email-jani.nikula@intel.com
(cherry picked from commit 013dd9e0)
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f3974167
...@@ -11930,11 +11930,21 @@ connected_sink_compute_bpp(struct intel_connector *connector, ...@@ -11930,11 +11930,21 @@ connected_sink_compute_bpp(struct intel_connector *connector,
pipe_config->pipe_bpp = connector->base.display_info.bpc*3; pipe_config->pipe_bpp = connector->base.display_info.bpc*3;
} }
/* Clamp bpp to 8 on screens without EDID 1.4 */ /* Clamp bpp to default limit on screens without EDID 1.4 */
if (connector->base.display_info.bpc == 0 && bpp > 24) { if (connector->base.display_info.bpc == 0) {
DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n", int type = connector->base.connector_type;
bpp); int clamp_bpp = 24;
pipe_config->pipe_bpp = 24;
/* Fall back to 18 bpp when DP sink capability is unknown. */
if (type == DRM_MODE_CONNECTOR_DisplayPort ||
type == DRM_MODE_CONNECTOR_eDP)
clamp_bpp = 18;
if (bpp > clamp_bpp) {
DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of %d\n",
bpp, clamp_bpp);
pipe_config->pipe_bpp = clamp_bpp;
}
} }
} }
......
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