Commit 6ef25aa0 authored by Like Xu's avatar Like Xu Committed by Paolo Bonzini

KVM: x86/pmu: Restrict advanced features based on module enable_pmu

Once vPMU is disabled, the KVM would not expose features like:
PEBS (via clear kvm_pmu_cap.pebs_ept), legacy LBR and ARCH_LBR,
CPUID 0xA leaf, PDCM bit and MSR_IA32_PERF_CAPABILITIES, plus
PT_MODE_HOST_GUEST mode.

What this group of features has in common is that their use
relies on the underlying PMU counter and the host perf_event as a
back-end resource requester or sharing part of the irq delivery path.
Signed-off-by: default avatarLike Xu <likexu@tencent.com>
Message-Id: <20220601031925.59693-2-likexu@tencent.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent b9181c8e
...@@ -170,9 +170,11 @@ static inline void kvm_init_pmu_capability(void) ...@@ -170,9 +170,11 @@ static inline void kvm_init_pmu_capability(void)
* For Intel, only support guest architectural pmu * For Intel, only support guest architectural pmu
* on a host with architectural pmu. * on a host with architectural pmu.
*/ */
if ((is_intel && !kvm_pmu_cap.version) || !kvm_pmu_cap.num_counters_gp) { if ((is_intel && !kvm_pmu_cap.version) || !kvm_pmu_cap.num_counters_gp)
memset(&kvm_pmu_cap, 0, sizeof(kvm_pmu_cap));
enable_pmu = false; enable_pmu = false;
if (!enable_pmu) {
memset(&kvm_pmu_cap, 0, sizeof(kvm_pmu_cap));
return; return;
} }
......
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
#include "lapic.h" #include "lapic.h"
#include "x86.h" #include "x86.h"
#include "pmu.h" #include "pmu.h"
#include "cpuid.h"
extern bool __read_mostly enable_vpid; extern bool __read_mostly enable_vpid;
extern bool __read_mostly flexpriority_enabled; extern bool __read_mostly flexpriority_enabled;
...@@ -409,6 +410,9 @@ static inline u64 vmx_get_perf_capabilities(void) ...@@ -409,6 +410,9 @@ static inline u64 vmx_get_perf_capabilities(void)
u64 perf_cap = PMU_CAP_FW_WRITES; u64 perf_cap = PMU_CAP_FW_WRITES;
u64 host_perf_cap = 0; u64 host_perf_cap = 0;
if (!enable_pmu)
return 0;
if (boot_cpu_has(X86_FEATURE_PDCM)) if (boot_cpu_has(X86_FEATURE_PDCM))
rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap); rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);
......
...@@ -7568,6 +7568,9 @@ static __init void vmx_set_cpu_caps(void) ...@@ -7568,6 +7568,9 @@ static __init void vmx_set_cpu_caps(void)
kvm_cpu_cap_check_and_set(X86_FEATURE_DTES64); kvm_cpu_cap_check_and_set(X86_FEATURE_DTES64);
} }
if (!enable_pmu)
kvm_cpu_cap_clear(X86_FEATURE_PDCM);
if (!enable_sgx) { if (!enable_sgx) {
kvm_cpu_cap_clear(X86_FEATURE_SGX); kvm_cpu_cap_clear(X86_FEATURE_SGX);
kvm_cpu_cap_clear(X86_FEATURE_SGX_LC); kvm_cpu_cap_clear(X86_FEATURE_SGX_LC);
...@@ -8233,7 +8236,7 @@ static __init int hardware_setup(void) ...@@ -8233,7 +8236,7 @@ static __init int hardware_setup(void)
if (pt_mode != PT_MODE_SYSTEM && pt_mode != PT_MODE_HOST_GUEST) if (pt_mode != PT_MODE_SYSTEM && pt_mode != PT_MODE_HOST_GUEST)
return -EINVAL; return -EINVAL;
if (!enable_ept || !cpu_has_vmx_intel_pt()) if (!enable_ept || !enable_pmu || !cpu_has_vmx_intel_pt())
pt_mode = PT_MODE_SYSTEM; pt_mode = PT_MODE_SYSTEM;
if (pt_mode == PT_MODE_HOST_GUEST) if (pt_mode == PT_MODE_HOST_GUEST)
vmx_init_ops.handle_intel_pt_intr = vmx_handle_intel_pt_intr; vmx_init_ops.handle_intel_pt_intr = vmx_handle_intel_pt_intr;
......
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