Commit 6f53196b authored by Devesh Sharma's avatar Devesh Sharma Committed by Jason Gunthorpe

RDMA/bnxt_re: Refactor doorbell management functions

Moving all the fast path doorbell functions at one place under
qplib_res.h. To pass doorbell record information a new structure
bnxt_qplib_db_info has been introduced.  Every roce object holds an
instance of this structure and doorbell information is initialized during
resource creation.

When DB is rung only the current queue index is read from hardware ring
and rest of the data is taken from pre-initialized dbinfo structure.

Link: https://lore.kernel.org/r/1581786665-23705-8-git-send-email-devesh.sharma@broadcom.comSigned-off-by: default avatarDevesh Sharma <devesh.sharma@broadcom.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parent 9555352b
This diff is collapsed.
...@@ -42,7 +42,7 @@ ...@@ -42,7 +42,7 @@
struct bnxt_qplib_srq { struct bnxt_qplib_srq {
struct bnxt_qplib_pd *pd; struct bnxt_qplib_pd *pd;
struct bnxt_qplib_dpi *dpi; struct bnxt_qplib_dpi *dpi;
void __iomem *dbr_base; struct bnxt_qplib_db_info dbinfo;
u64 srq_handle; u64 srq_handle;
u32 id; u32 id;
u32 max_wqe; u32 max_wqe;
...@@ -236,6 +236,7 @@ struct bnxt_qplib_swqe { ...@@ -236,6 +236,7 @@ struct bnxt_qplib_swqe {
struct bnxt_qplib_q { struct bnxt_qplib_q {
struct bnxt_qplib_hwq hwq; struct bnxt_qplib_hwq hwq;
struct bnxt_qplib_swq *swq; struct bnxt_qplib_swq *swq;
struct bnxt_qplib_db_info dbinfo;
struct bnxt_qplib_sg_info sg_info; struct bnxt_qplib_sg_info sg_info;
u32 max_wqe; u32 max_wqe;
u16 q_full_delta; u16 q_full_delta;
...@@ -370,7 +371,7 @@ struct bnxt_qplib_cqe { ...@@ -370,7 +371,7 @@ struct bnxt_qplib_cqe {
#define BNXT_QPLIB_QUEUE_START_PERIOD 0x01 #define BNXT_QPLIB_QUEUE_START_PERIOD 0x01
struct bnxt_qplib_cq { struct bnxt_qplib_cq {
struct bnxt_qplib_dpi *dpi; struct bnxt_qplib_dpi *dpi;
void __iomem *dbr_base; struct bnxt_qplib_db_info dbinfo;
u32 max_wqe; u32 max_wqe;
u32 id; u32 id;
u16 count; u16 count;
...@@ -433,46 +434,9 @@ struct bnxt_qplib_cq { ...@@ -433,46 +434,9 @@ struct bnxt_qplib_cq {
NQ_DB_IDX_VALID | \ NQ_DB_IDX_VALID | \
NQ_DB_IRQ_DIS) NQ_DB_IRQ_DIS)
static inline void bnxt_qplib_ring_nq_db64(void __iomem *db, u32 index,
u32 xid, bool arm)
{
u64 val;
val = xid & DBC_DBC_XID_MASK;
val |= DBC_DBC_PATH_ROCE;
val |= arm ? DBC_DBC_TYPE_NQ_ARM : DBC_DBC_TYPE_NQ;
val <<= 32;
val |= index & DBC_DBC_INDEX_MASK;
writeq(val, db);
}
static inline void bnxt_qplib_ring_nq_db_rearm(void __iomem *db, u32 raw_cons,
u32 max_elements, u32 xid,
bool gen_p5)
{
u32 index = raw_cons & (max_elements - 1);
if (gen_p5)
bnxt_qplib_ring_nq_db64(db, index, xid, true);
else
writel(NQ_DB_CP_FLAGS_REARM | (index & DBC_DBC32_XID_MASK), db);
}
static inline void bnxt_qplib_ring_nq_db(void __iomem *db, u32 raw_cons,
u32 max_elements, u32 xid,
bool gen_p5)
{
u32 index = raw_cons & (max_elements - 1);
if (gen_p5)
bnxt_qplib_ring_nq_db64(db, index, xid, false);
else
writel(NQ_DB_CP_FLAGS | (index & DBC_DBC32_XID_MASK), db);
}
struct bnxt_qplib_nq_db { struct bnxt_qplib_nq_db {
struct bnxt_qplib_reg_desc reg; struct bnxt_qplib_reg_desc reg;
void __iomem *db; struct bnxt_qplib_db_info dbinfo;
}; };
typedef int (*cqn_handler_t)(struct bnxt_qplib_nq *nq, typedef int (*cqn_handler_t)(struct bnxt_qplib_nq *nq,
......
...@@ -379,7 +379,6 @@ static int bnxt_qplib_process_qp_event(struct bnxt_qplib_rcfw *rcfw, ...@@ -379,7 +379,6 @@ static int bnxt_qplib_process_qp_event(struct bnxt_qplib_rcfw *rcfw,
static void bnxt_qplib_service_creq(unsigned long data) static void bnxt_qplib_service_creq(unsigned long data)
{ {
struct bnxt_qplib_rcfw *rcfw = (struct bnxt_qplib_rcfw *)data; struct bnxt_qplib_rcfw *rcfw = (struct bnxt_qplib_rcfw *)data;
bool gen_p5 = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx);
struct bnxt_qplib_creq_ctx *creq = &rcfw->creq; struct bnxt_qplib_creq_ctx *creq = &rcfw->creq;
u32 type, budget = CREQ_ENTRY_POLL_BUDGET; u32 type, budget = CREQ_ENTRY_POLL_BUDGET;
struct bnxt_qplib_hwq *hwq = &creq->hwq; struct bnxt_qplib_hwq *hwq = &creq->hwq;
...@@ -429,9 +428,8 @@ static void bnxt_qplib_service_creq(unsigned long data) ...@@ -429,9 +428,8 @@ static void bnxt_qplib_service_creq(unsigned long data)
if (hwq->cons != raw_cons) { if (hwq->cons != raw_cons) {
hwq->cons = raw_cons; hwq->cons = raw_cons;
bnxt_qplib_ring_creq_db_rearm(creq->creq_db.db, bnxt_qplib_ring_nq_db(&creq->creq_db.dbinfo,
raw_cons, hwq->max_elements, rcfw->res->cctx, true);
creq->ring_id, gen_p5);
} }
spin_unlock_irqrestore(&hwq->lock, flags); spin_unlock_irqrestore(&hwq->lock, flags);
} }
...@@ -660,15 +658,12 @@ int bnxt_qplib_alloc_rcfw_channel(struct bnxt_qplib_res *res, ...@@ -660,15 +658,12 @@ int bnxt_qplib_alloc_rcfw_channel(struct bnxt_qplib_res *res,
void bnxt_qplib_rcfw_stop_irq(struct bnxt_qplib_rcfw *rcfw, bool kill) void bnxt_qplib_rcfw_stop_irq(struct bnxt_qplib_rcfw *rcfw, bool kill)
{ {
bool gen_p5 = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx);
struct bnxt_qplib_creq_ctx *creq; struct bnxt_qplib_creq_ctx *creq;
creq = &rcfw->creq; creq = &rcfw->creq;
tasklet_disable(&creq->creq_tasklet); tasklet_disable(&creq->creq_tasklet);
/* Mask h/w interrupts */ /* Mask h/w interrupts */
bnxt_qplib_ring_creq_db(creq->creq_db.db, creq->hwq.cons, bnxt_qplib_ring_nq_db(&creq->creq_db.dbinfo, rcfw->res->cctx, false);
creq->hwq.max_elements, creq->ring_id,
gen_p5);
/* Sync with last running IRQ-handler */ /* Sync with last running IRQ-handler */
synchronize_irq(creq->msix_vec); synchronize_irq(creq->msix_vec);
if (kill) if (kill)
...@@ -708,7 +703,6 @@ void bnxt_qplib_disable_rcfw_channel(struct bnxt_qplib_rcfw *rcfw) ...@@ -708,7 +703,6 @@ void bnxt_qplib_disable_rcfw_channel(struct bnxt_qplib_rcfw *rcfw)
int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector, int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector,
bool need_init) bool need_init)
{ {
bool gen_p5 = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx);
struct bnxt_qplib_creq_ctx *creq; struct bnxt_qplib_creq_ctx *creq;
int rc; int rc;
...@@ -728,9 +722,8 @@ int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector, ...@@ -728,9 +722,8 @@ int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector,
if (rc) if (rc)
return rc; return rc;
creq->requested = true; creq->requested = true;
bnxt_qplib_ring_creq_db_rearm(creq->creq_db.db,
creq->hwq.cons, creq->hwq.max_elements, bnxt_qplib_ring_nq_db(&creq->creq_db.dbinfo, rcfw->res->cctx, true);
creq->ring_id, gen_p5);
return 0; return 0;
} }
...@@ -799,7 +792,9 @@ static int bnxt_qplib_map_creq_db(struct bnxt_qplib_rcfw *rcfw, u32 reg_offt) ...@@ -799,7 +792,9 @@ static int bnxt_qplib_map_creq_db(struct bnxt_qplib_rcfw *rcfw, u32 reg_offt)
creq_db->reg.bar_id); creq_db->reg.bar_id);
return -ENOMEM; return -ENOMEM;
} }
creq_db->db = creq_db->reg.bar_reg; creq_db->dbinfo.db = creq_db->reg.bar_reg;
creq_db->dbinfo.hwq = &rcfw->creq.hwq;
creq_db->dbinfo.xid = rcfw->creq.ring_id;
return 0; return 0;
} }
......
...@@ -247,7 +247,7 @@ struct bnxt_qplib_cmdq_ctx { ...@@ -247,7 +247,7 @@ struct bnxt_qplib_cmdq_ctx {
struct bnxt_qplib_creq_db { struct bnxt_qplib_creq_db {
struct bnxt_qplib_reg_desc reg; struct bnxt_qplib_reg_desc reg;
void __iomem *db; struct bnxt_qplib_db_info dbinfo;
}; };
struct bnxt_qplib_creq_stat { struct bnxt_qplib_creq_stat {
......
...@@ -133,6 +133,13 @@ struct bnxt_qplib_hwq { ...@@ -133,6 +133,13 @@ struct bnxt_qplib_hwq {
u8 is_user; u8 is_user;
}; };
struct bnxt_qplib_db_info {
void __iomem *db;
void __iomem *priv_db;
struct bnxt_qplib_hwq *hwq;
u32 xid;
};
/* Tables */ /* Tables */
struct bnxt_qplib_pd_tbl { struct bnxt_qplib_pd_tbl {
unsigned long *tbl; unsigned long *tbl;
...@@ -290,4 +297,75 @@ void bnxt_qplib_free_ctx(struct bnxt_qplib_res *res, ...@@ -290,4 +297,75 @@ void bnxt_qplib_free_ctx(struct bnxt_qplib_res *res,
int bnxt_qplib_alloc_ctx(struct bnxt_qplib_res *res, int bnxt_qplib_alloc_ctx(struct bnxt_qplib_res *res,
struct bnxt_qplib_ctx *ctx, struct bnxt_qplib_ctx *ctx,
bool virt_fn, bool is_p5); bool virt_fn, bool is_p5);
static inline void bnxt_qplib_ring_db32(struct bnxt_qplib_db_info *info,
bool arm)
{
u32 key;
key = info->hwq->cons & (info->hwq->max_elements - 1);
key |= (CMPL_DOORBELL_IDX_VALID |
(CMPL_DOORBELL_KEY_CMPL & CMPL_DOORBELL_KEY_MASK));
if (!arm)
key |= CMPL_DOORBELL_MASK;
writel(key, info->db);
}
static inline void bnxt_qplib_ring_db(struct bnxt_qplib_db_info *info,
u32 type)
{
u64 key = 0;
key = (info->xid & DBC_DBC_XID_MASK) | DBC_DBC_PATH_ROCE | type;
key <<= 32;
key |= (info->hwq->cons & (info->hwq->max_elements - 1)) &
DBC_DBC_INDEX_MASK;
writeq(key, info->db);
}
static inline void bnxt_qplib_ring_prod_db(struct bnxt_qplib_db_info *info,
u32 type)
{
u64 key = 0;
key = (info->xid & DBC_DBC_XID_MASK) | DBC_DBC_PATH_ROCE | type;
key <<= 32;
key |= (info->hwq->prod & (info->hwq->max_elements - 1)) &
DBC_DBC_INDEX_MASK;
writeq(key, info->db);
}
static inline void bnxt_qplib_armen_db(struct bnxt_qplib_db_info *info,
u32 type)
{
u64 key = 0;
key = (info->xid & DBC_DBC_XID_MASK) | DBC_DBC_PATH_ROCE | type;
key <<= 32;
writeq(key, info->priv_db);
}
static inline void bnxt_qplib_srq_arm_db(struct bnxt_qplib_db_info *info,
u32 th)
{
u64 key = 0;
key = (info->xid & DBC_DBC_XID_MASK) | DBC_DBC_PATH_ROCE | th;
key <<= 32;
key |= th & DBC_DBC_INDEX_MASK;
writeq(key, info->priv_db);
}
static inline void bnxt_qplib_ring_nq_db(struct bnxt_qplib_db_info *info,
struct bnxt_qplib_chip_ctx *cctx,
bool arm)
{
u32 type;
type = arm ? DBC_DBC_TYPE_NQ_ARM : DBC_DBC_TYPE_NQ;
if (bnxt_qplib_is_chip_gen_p5(cctx))
bnxt_qplib_ring_db(info, type);
else
bnxt_qplib_ring_db32(info, arm);
}
#endif /* __BNXT_QPLIB_RES_H__ */ #endif /* __BNXT_QPLIB_RES_H__ */
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