Commit 6faff9b6 authored by Max Schwarz's avatar Max Schwarz Committed by Heiko Stuebner

ARM: rockchip: rk3188: enable pull-ups on UART RX pins

The default behaviour of the uart-rx pins on the rk3188 is to be pulled up and
a lot of designs use diodes to even prevent them from being raised from the
outside.

Therefore change the rx-pin settings accordingly.

This also fixes a uart receive problem on mass production Radxa Rock boards.
Signed-off-by: default avatarMax Schwarz <max.schwarz@online.de>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent c9eaa447
......@@ -149,7 +149,7 @@ pcfg_pull_none: pcfg_pull_none {
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>,
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
};
......@@ -164,7 +164,7 @@ uart0_rts: uart0-rts {
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>,
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
};
......@@ -179,7 +179,7 @@ uart1_rts: uart1-rts {
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>,
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
......@@ -187,7 +187,7 @@ uart2_xfer: uart2-xfer {
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>,
rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
};
......
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