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Commit 708795cd authored by Olof Johansson's avatar Olof Johansson
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Merge branch 'io-cleanup-for-3.4' of git://sources.calxeda.com/kernel/linux into next/cleanup2 

* 'io-cleanup-for-3.4' of git://sources.calxeda.com/kernel/linux: (22 commits)
  ARM: kill off __mem_pci
  ARM: remove bunch of now unused mach/io.h files
  ARM: make mach/io.h include optional
  ARM: clps711x: remove unneeded include of mach/io.h
  ARM: dove: add explicit include of dove.h to addr-map.c
  ARM: at91: add explicit include of hardware.h to uncompressor
  ARM: ep93xx: clean-up mach/io.h
  ARM: tegra: clean-up mach/io.h
  ARM: orion5x: clean-up mach/io.h
  ARM: davinci: remove unneeded mach/io.h include
  [media] davinci: remove includes of mach/io.h
  ARM: OMAP: Remove remaining includes for mach/io.h
  ARM: msm: clean-up mach/io.h
  ARM: iop13xx: move io.h externs to pci.h
  ARM: remove compile time __arch_ioremap/__arch_iounmap
  ARM: ebsa110: use runtime ioremap hook
  ARM: ixp4xx: use runtime ioremap hook
  ARM: iop13xx: use runtime ioremap hook
  ARM: msm: use runtime ioremap hook
  ARM: imx: convert to common runtime ioremap hook
  ...
parents d50673ed 5621caac
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arch/arm/Kconfig
View file @ 708795cd
...@@ -217,6 +217,13 @@ config ARM_PATCH_PHYS_VIRT ...@@ -217,6 +217,13 @@ config ARM_PATCH_PHYS_VIRT
this feature (eg, building a kernel for a single machine) and this feature (eg, building a kernel for a single machine) and
you need to shrink the kernel to the minimal size. you need to shrink the kernel to the minimal size.
config NEED_MACH_IO_H
bool
help
Select this when mach/io.h is required to provide special
definitions for this platform. The need for mach/io.h should
be avoided when possible.
config NEED_MACH_MEMORY_H config NEED_MACH_MEMORY_H
bool bool
help help
...@@ -268,6 +275,7 @@ config ARCH_INTEGRATOR ...@@ -268,6 +275,7 @@ config ARCH_INTEGRATOR
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select PLAT_VERSATILE select PLAT_VERSATILE
select PLAT_VERSATILE_FPGA_IRQ select PLAT_VERSATILE_FPGA_IRQ
select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H select NEED_MACH_MEMORY_H
help help
Support for ARM's Integrator platform. Support for ARM's Integrator platform.
...@@ -403,6 +411,7 @@ config ARCH_EBSA110 ...@@ -403,6 +411,7 @@ config ARCH_EBSA110
select ISA select ISA
select NO_IOPORT select NO_IOPORT
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H select NEED_MACH_MEMORY_H
help help
This is an evaluation board for the StrongARM processor available This is an evaluation board for the StrongARM processor available
...@@ -429,6 +438,7 @@ config ARCH_FOOTBRIDGE ...@@ -429,6 +438,7 @@ config ARCH_FOOTBRIDGE
select FOOTBRIDGE select FOOTBRIDGE
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select HAVE_IDE select HAVE_IDE
select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H select NEED_MACH_MEMORY_H
help help
Support for systems based on the DC21285 companion chip Support for systems based on the DC21285 companion chip
...@@ -481,6 +491,7 @@ config ARCH_IOP13XX ...@@ -481,6 +491,7 @@ config ARCH_IOP13XX
select PCI select PCI
select ARCH_SUPPORTS_MSI select ARCH_SUPPORTS_MSI
select VMSPLIT_1G select VMSPLIT_1G
select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H select NEED_MACH_MEMORY_H
select NEED_RET_TO_USER select NEED_RET_TO_USER
help help
...@@ -490,6 +501,7 @@ config ARCH_IOP32X ...@@ -490,6 +501,7 @@ config ARCH_IOP32X
bool "IOP32x-based" bool "IOP32x-based"
depends on MMU depends on MMU
select CPU_XSCALE select CPU_XSCALE
select NEED_MACH_IO_H
select NEED_RET_TO_USER select NEED_RET_TO_USER
select PLAT_IOP select PLAT_IOP
select PCI select PCI
...@@ -502,6 +514,7 @@ config ARCH_IOP33X ...@@ -502,6 +514,7 @@ config ARCH_IOP33X
bool "IOP33x-based" bool "IOP33x-based"
depends on MMU depends on MMU
select CPU_XSCALE select CPU_XSCALE
select NEED_MACH_IO_H
select NEED_RET_TO_USER select NEED_RET_TO_USER
select PLAT_IOP select PLAT_IOP
select PCI select PCI
...@@ -515,6 +528,7 @@ config ARCH_IXP23XX ...@@ -515,6 +528,7 @@ config ARCH_IXP23XX
select CPU_XSC3 select CPU_XSC3
select PCI select PCI
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H select NEED_MACH_MEMORY_H
help help
Support for Intel's IXP23xx (XScale) family of processors. Support for Intel's IXP23xx (XScale) family of processors.
...@@ -525,6 +539,7 @@ config ARCH_IXP2000 ...@@ -525,6 +539,7 @@ config ARCH_IXP2000
select CPU_XSCALE select CPU_XSCALE
select PCI select PCI
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H select NEED_MACH_MEMORY_H
help help
Support for Intel's IXP2400/2800 (XScale) family of processors. Support for Intel's IXP2400/2800 (XScale) family of processors.
...@@ -538,6 +553,7 @@ config ARCH_IXP4XX ...@@ -538,6 +553,7 @@ config ARCH_IXP4XX
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select HAVE_SCHED_CLOCK select HAVE_SCHED_CLOCK
select MIGHT_HAVE_PCI select MIGHT_HAVE_PCI
select NEED_MACH_IO_H
select DMABOUNCE if PCI select DMABOUNCE if PCI
help help
Support for Intel's IXP4XX (XScale) family of processors. Support for Intel's IXP4XX (XScale) family of processors.
...@@ -548,6 +564,7 @@ config ARCH_DOVE ...@@ -548,6 +564,7 @@ config ARCH_DOVE
select PCI select PCI
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select NEED_MACH_IO_H
select PLAT_ORION select PLAT_ORION
help help
Support for the Marvell Dove SoC 88AP510 Support for the Marvell Dove SoC 88AP510
...@@ -558,6 +575,7 @@ config ARCH_KIRKWOOD ...@@ -558,6 +575,7 @@ config ARCH_KIRKWOOD
select PCI select PCI
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select NEED_MACH_IO_H
select PLAT_ORION select PLAT_ORION
help help
Support for the following Marvell Kirkwood series SoCs: Support for the following Marvell Kirkwood series SoCs:
...@@ -582,6 +600,7 @@ config ARCH_MV78XX0 ...@@ -582,6 +600,7 @@ config ARCH_MV78XX0
select PCI select PCI
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select NEED_MACH_IO_H
select PLAT_ORION select PLAT_ORION
help help
Support for the following Marvell MV78xx0 series SoCs: Support for the following Marvell MV78xx0 series SoCs:
...@@ -651,6 +670,7 @@ config ARCH_TEGRA ...@@ -651,6 +670,7 @@ config ARCH_TEGRA
select HAVE_SCHED_CLOCK select HAVE_SCHED_CLOCK
select HAVE_SMP select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0 select MIGHT_HAVE_CACHE_L2X0
select NEED_MACH_IO_H if PCI
select ARCH_HAS_CPUFREQ select ARCH_HAS_CPUFREQ
help help
This enables support for NVIDIA Tegra based systems (Tegra APX, This enables support for NVIDIA Tegra based systems (Tegra APX,
...@@ -745,6 +765,7 @@ config ARCH_RPC ...@@ -745,6 +765,7 @@ config ARCH_RPC
select ARCH_SPARSEMEM_ENABLE select ARCH_SPARSEMEM_ENABLE
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select HAVE_IDE select HAVE_IDE
select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H select NEED_MACH_MEMORY_H
help help
On the Acorn Risc-PC, Linux can support the internal IDE disk and On the Acorn Risc-PC, Linux can support the internal IDE disk and
...@@ -777,6 +798,7 @@ config ARCH_S3C2410 ...@@ -777,6 +798,7 @@ config ARCH_S3C2410
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_I2C if I2C
select NEED_MACH_IO_H
help help
Samsung S3C2410X CPU based systems, such as the Simtec Electronics Samsung S3C2410X CPU based systems, such as the Simtec Electronics
BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
...@@ -883,6 +905,7 @@ config ARCH_SHARK ...@@ -883,6 +905,7 @@ config ARCH_SHARK
select PCI select PCI
select ARCH_USES_GETTIMEOFFSET select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H select NEED_MACH_MEMORY_H
select NEED_MACH_IO_H
help help
Support for the StrongARM based Digital DNARD machine, also known Support for the StrongARM based Digital DNARD machine, also known
as "Shark" (<http://www.shark-linux.de/shark.html>). as "Shark" (<http://www.shark-linux.de/shark.html>).
......
arch/arm/include/asm/io.h
View file @ 708795cd
...@@ -83,6 +83,11 @@ extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, uns ...@@ -83,6 +83,11 @@ extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, uns
extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int); extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int);
extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached); extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached);
extern void __iounmap(volatile void __iomem *addr); extern void __iounmap(volatile void __iomem *addr);
extern void __arm_iounmap(volatile void __iomem *addr);
extern void __iomem * (*arch_ioremap_caller)(unsigned long, size_t,
unsigned int, void *);
extern void (*arch_iounmap)(volatile void __iomem *);
/* /*
* Bad read/write accesses... * Bad read/write accesses...
...@@ -109,7 +114,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr) ...@@ -109,7 +114,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
/* /*
* Now, pick up the machine-defined IO definitions * Now, pick up the machine-defined IO definitions
*/ */
#ifdef CONFIG_NEED_MACH_IO_H
#include <mach/io.h> #include <mach/io.h>
#else
#define __io(a) ({ (void)(a); __typesafe_io(0); })
#endif
/* /*
* This is the limit of PC card/PCI/ISA IO space, which is by default * This is the limit of PC card/PCI/ISA IO space, which is by default
...@@ -211,18 +220,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t); ...@@ -211,18 +220,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
* Again, this are defined to perform little endian accesses. See the * Again, this are defined to perform little endian accesses. See the
* IO port primitives for more information. * IO port primitives for more information.
*/ */
#ifdef __mem_pci #ifndef readl
#define readb_relaxed(c) ({ u8 __r = __raw_readb(__mem_pci(c)); __r; }) #define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \ #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
__raw_readw(__mem_pci(c))); __r; }) __raw_readw(c)); __r; })
#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \ #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
__raw_readl(__mem_pci(c))); __r; }) __raw_readl(c)); __r; })
#define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c))) #define writeb_relaxed(v,c) ((void)__raw_writeb(v,c))
#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ #define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \
cpu_to_le16(v),__mem_pci(c))) cpu_to_le16(v),c))
#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ #define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
cpu_to_le32(v),__mem_pci(c))) cpu_to_le32(v),c))
#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
...@@ -232,30 +241,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t); ...@@ -232,30 +241,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); }) #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); }) #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) #define readsb(p,d,l) __raw_readsb(p,d,l)
#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) #define readsw(p,d,l) __raw_readsw(p,d,l)
#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) #define readsl(p,d,l) __raw_readsl(p,d,l)
#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l)
#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l)
#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l)
#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) #define writesb(p,d,l) __raw_writesb(p,d,l)
#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) #define writesw(p,d,l) __raw_writesw(p,d,l)
#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) #define writesl(p,d,l) __raw_writesl(p,d,l)
#elif !defined(readb) #define memset_io(c,v,l) _memset_io(c,(v),(l))
#define memcpy_fromio(a,c,l) _memcpy_fromio((a),c,(l))
#define memcpy_toio(c,a,l) _memcpy_toio(c,(a),(l))
#define readb(c) (__readwrite_bug("readb"),0) #endif /* readl */
#define readw(c) (__readwrite_bug("readw"),0)
#define readl(c) (__readwrite_bug("readl"),0)
#define writeb(v,c) __readwrite_bug("writeb")
#define writew(v,c) __readwrite_bug("writew")
#define writel(v,c) __readwrite_bug("writel")
#define check_signature(io,sig,len) (0)
#endif /* __mem_pci */
/* /*
* ioremap and friends. * ioremap and friends.
...@@ -264,16 +262,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t); ...@@ -264,16 +262,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
* Documentation/io-mapping.txt. * Documentation/io-mapping.txt.
* *
*/ */
#ifndef __arch_ioremap #define ioremap(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
#define __arch_ioremap __arm_ioremap #define ioremap_nocache(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE)
#define __arch_iounmap __iounmap #define ioremap_cached(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_CACHED)
#endif #define ioremap_wc(cookie,size) __arm_ioremap((cookie), (size), MT_DEVICE_WC)
#define iounmap __arm_iounmap
#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
#define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC)
#define iounmap __arch_iounmap
/* /*
* io{read,write}{8,16,32} macros * io{read,write}{8,16,32} macros
......
arch/arm/mach-at91/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-at91/include/mach/io.h
*
* Copyright (C) 2003 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xFFFFFFFF
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-at91/include/mach/uncompress.h
View file @ 708795cd
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/atmel_serial.h> #include <linux/atmel_serial.h>
#include <mach/hardware.h>
#if defined(CONFIG_AT91_EARLY_DBGU0) #if defined(CONFIG_AT91_EARLY_DBGU0)
#define UART_OFFSET AT91_BASE_DBGU0 #define UART_OFFSET AT91_BASE_DBGU0
......
arch/arm/mach-bcmring/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
*
* Copyright (C) 1999 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-clps711x/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-clps711x/include/mach/io.h
*
* Copyright (C) 1999 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
/*
* We don't support ins[lb]/outs[lb]. Make them fault.
*/
#define __raw_readsb(p,d,l) do { *(int *)0 = 0; } while (0)
#define __raw_readsl(p,d,l) do { *(int *)0 = 0; } while (0)
#define __raw_writesb(p,d,l) do { *(int *)0 = 0; } while (0)
#define __raw_writesl(p,d,l) do { *(int *)0 = 0; } while (0)
#endif
arch/arm/mach-clps711x/include/mach/uncompress.h
View file @ 708795cd
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/ */
#include <mach/io.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/hardware/clps7111.h> #include <asm/hardware/clps7111.h>
......
arch/arm/mach-cns3xxx/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* Copyright 2008 Cavium Networks
* Copyright 2003 ARM Limited
*
* This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as
* published by the Free Software Foundation.
*/
#ifndef __MACH_IO_H
#define __MACH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-davinci/include/mach/entry-macro.S
View file @ 708795cd
...@@ -8,7 +8,6 @@ ...@@ -8,7 +8,6 @@
* is licensed "as is" without any warranty of any kind, whether express * is licensed "as is" without any warranty of any kind, whether express
* or implied. * or implied.
*/ */
#include <mach/io.h>
#include <mach/irqs.h> #include <mach/irqs.h>
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
......
arch/arm/mach-davinci/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* DaVinci IO address definitions
*
* Copied from include/asm/arm/arch-omap/io.h
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#endif /* __ASM_ARCH_IO_H */
arch/arm/mach-dove/addr-map.c
View file @ 708795cd
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/setup.h> #include <asm/setup.h>
#include <mach/dove.h>
#include <plat/addr-map.h> #include <plat/addr-map.h>
#include "common.h" #include "common.h"
......
arch/arm/mach-dove/include/mach/io.h
View file @ 708795cd
...@@ -15,6 +15,5 @@ ...@@ -15,6 +15,5 @@
#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \ #define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \
DOVE_PCIE0_IO_VIRT_BASE)) DOVE_PCIE0_IO_VIRT_BASE))
#define __mem_pci(a) (a)
#endif #endif
arch/arm/mach-ebsa110/core.c
View file @ 708795cd
...@@ -119,6 +119,20 @@ static void __init ebsa110_map_io(void) ...@@ -119,6 +119,20 @@ static void __init ebsa110_map_io(void)
iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc)); iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc));
} }
static void __iomem *ebsa110_ioremap_caller(unsigned long cookie, size_t size,
unsigned int flags, void *caller)
{
return (void __iomem *)cookie;
}
static void ebsa110_iounmap(volatile void __iomem *io_addr)
{}
static void __init ebsa110_init_early(void)
{
arch_ioremap_caller = ebsa110_ioremap_caller;
arch_iounmap = ebsa110_iounmap;
}
#define PIT_CTRL (PIT_BASE + 0x0d) #define PIT_CTRL (PIT_BASE + 0x0d)
#define PIT_T2 (PIT_BASE + 0x09) #define PIT_T2 (PIT_BASE + 0x09)
...@@ -315,6 +329,7 @@ MACHINE_START(EBSA110, "EBSA110") ...@@ -315,6 +329,7 @@ MACHINE_START(EBSA110, "EBSA110")
.reserve_lp2 = 1, .reserve_lp2 = 1,
.restart_mode = 's', .restart_mode = 's',
.map_io = ebsa110_map_io, .map_io = ebsa110_map_io,
.init_early = ebsa110_init_early,
.init_irq = ebsa110_init_irq, .init_irq = ebsa110_init_irq,
.timer = &ebsa110_timer, .timer = &ebsa110_timer,
.restart = ebsa110_restart, .restart = ebsa110_restart,
......
arch/arm/mach-ebsa110/include/mach/io.h
View file @ 708795cd
...@@ -62,15 +62,6 @@ void __writel(u32 val, void __iomem *addr); ...@@ -62,15 +62,6 @@ void __writel(u32 val, void __iomem *addr);
#define writew(v,b) __writew(v,b) #define writew(v,b) __writew(v,b)
#define writel(v,b) __writel(v,b) #define writel(v,b) __writel(v,b)
static inline void __iomem *__arch_ioremap(unsigned long cookie, size_t size,
unsigned int flags)
{
return (void __iomem *)cookie;
}
#define __arch_ioremap __arch_ioremap
#define __arch_iounmap(cookie) do { } while (0)
extern void insb(unsigned int port, void *buf, int sz); extern void insb(unsigned int port, void *buf, int sz);
extern void insw(unsigned int port, void *buf, int sz); extern void insw(unsigned int port, void *buf, int sz);
extern void insl(unsigned int port, void *buf, int sz); extern void insl(unsigned int port, void *buf, int sz);
......
arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
View file @ 708795cd
...@@ -5,6 +5,15 @@ ...@@ -5,6 +5,15 @@
#ifndef __ASM_ARCH_EP93XX_REGS_H #ifndef __ASM_ARCH_EP93XX_REGS_H
#define __ASM_ARCH_EP93XX_REGS_H #define __ASM_ARCH_EP93XX_REGS_H
/*
* A typesafe __io() variation for variable initialisers
*/
#ifdef __ASSEMBLER__
#define IOMEM(p) p
#else
#define IOMEM(p) ((void __iomem __force *)(p))
#endif
/* /*
* EP93xx Physical Memory Map: * EP93xx Physical Memory Map:
* *
......
arch/arm/mach-ep93xx/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-ep93xx/include/mach/io.h
*/
#ifndef __ASM_MACH_IO_H
#define __ASM_MACH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(p) __typesafe_io(p)
#define __mem_pci(p) (p)
/*
* A typesafe __io() variation for variable initialisers
*/
#ifdef __ASSEMBLER__
#define IOMEM(p) p
#else
#define IOMEM(p) ((void __iomem __force *)(p))
#endif
#endif /* __ASM_MACH_IO_H */
arch/arm/mach-exynos/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/* linux/arch/arm/mach-exynos4/include/mach/io.h
*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
*
* Based on arch/arm/mach-s5p6442/include/mach/io.h
*
* Default IO routines for EXYNOS4
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H __FILE__
/* No current ISA/PCI bus support. */
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#define IO_SPACE_LIMIT (0xFFFFFFFF)
#endif /* __ASM_ARM_ARCH_IO_H */
arch/arm/mach-footbridge/include/mach/io.h
View file @ 708795cd
...@@ -27,18 +27,5 @@ ...@@ -27,18 +27,5 @@
* Translation of various region addresses to virtual addresses * Translation of various region addresses to virtual addresses
*/ */
#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) #define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
#if 1
#define __mem_pci(a) (a)
#else
static inline void __iomem *___mem_pci(void __iomem *p)
{
unsigned long a = (unsigned long)p;
BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
return p;
}
#define __mem_pci(a) ___mem_pci(a)
#endif
#endif #endif
arch/arm/mach-gemini/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* Copyright (C) 2001-2006 Storlink, Corp.
* Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __MACH_IO_H
#define __MACH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif /* __MACH_IO_H */
arch/arm/mach-h720x/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-h720x/include/mach/io.h
*
* Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
*
* Changelog:
*
* 09-19-2001 JJKIM
* Created from arch/arm/mach-l7200/include/mach/io.h
*
* 03-27-2003 Robert Schwebel <r.schwebel@pengutronix.de>:
* re-unified header files for h720x
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-highbank/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
#ifndef __MACH_IO_H
#define __MACH_IO_H
#define __io(a) ({ (void)(a); __typesafe_io(0); })
#define __mem_pci(a) (a)
#endif
arch/arm/mach-imx/mm-imx3.c
View file @ 708795cd
...@@ -59,8 +59,8 @@ static void imx3_idle(void) ...@@ -59,8 +59,8 @@ static void imx3_idle(void)
: "=r" (reg)); : "=r" (reg));
} }
static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, static void __iomem *imx3_ioremap_caller(unsigned long phys_addr, size_t size,
unsigned int mtype) unsigned int mtype, void *caller)
{ {
if (mtype == MT_DEVICE) { if (mtype == MT_DEVICE) {
/* /*
...@@ -73,7 +73,7 @@ static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, ...@@ -73,7 +73,7 @@ static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
mtype = MT_DEVICE_NONSHARED; mtype = MT_DEVICE_NONSHARED;
} }
return __arm_ioremap(phys_addr, size, mtype); return __arm_ioremap_caller(phys_addr, size, mtype, caller);
} }
void imx3_init_l2x0(void) void imx3_init_l2x0(void)
...@@ -132,7 +132,7 @@ void __init imx31_init_early(void) ...@@ -132,7 +132,7 @@ void __init imx31_init_early(void)
{ {
mxc_set_cpu_type(MXC_CPU_MX31); mxc_set_cpu_type(MXC_CPU_MX31);
mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
imx_ioremap = imx3_ioremap; arch_ioremap_caller = imx3_ioremap_caller;
arm_pm_idle = imx3_idle; arm_pm_idle = imx3_idle;
} }
...@@ -196,7 +196,7 @@ void __init imx35_init_early(void) ...@@ -196,7 +196,7 @@ void __init imx35_init_early(void)
mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
arm_pm_idle = imx3_idle; arm_pm_idle = imx3_idle;
imx_ioremap = imx3_ioremap; arch_ioremap_caller = imx3_ioremap_caller;
} }
void __init mx35_init_irq(void) void __init mx35_init_irq(void)
......
arch/arm/mach-integrator/include/mach/io.h
View file @ 708795cd
...@@ -29,6 +29,5 @@ ...@@ -29,6 +29,5 @@
#define PCI_IO_VADDR 0xee000000 #define PCI_IO_VADDR 0xee000000
#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) #define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
#define __mem_pci(a) (a)
#endif #endif
arch/arm/mach-iop13xx/include/mach/io.h
View file @ 708795cd
...@@ -22,20 +22,7 @@ ...@@ -22,20 +22,7 @@
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __iop13xx_io(a) #define __io(a) __iop13xx_io(a)
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
extern void __iomem * __iop13xx_io(unsigned long io_addr); extern void __iomem * __iop13xx_io(unsigned long io_addr);
extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
unsigned int mtype);
extern void __iop13xx_iounmap(void __iomem *addr);
extern u32 iop13xx_atue_mem_base;
extern u32 iop13xx_atux_mem_base;
extern size_t iop13xx_atue_mem_size;
extern size_t iop13xx_atux_mem_size;
#define __arch_ioremap __iop13xx_ioremap
#define __arch_iounmap __iop13xx_iounmap
#endif #endif
arch/arm/mach-iop13xx/io.c
View file @ 708795cd
...@@ -21,6 +21,8 @@ ...@@ -21,6 +21,8 @@
#include <linux/io.h> #include <linux/io.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include "pci.h"
void * __iomem __iop13xx_io(unsigned long io_addr) void * __iomem __iop13xx_io(unsigned long io_addr)
{ {
void __iomem * io_virt; void __iomem * io_virt;
...@@ -40,8 +42,8 @@ void * __iomem __iop13xx_io(unsigned long io_addr) ...@@ -40,8 +42,8 @@ void * __iomem __iop13xx_io(unsigned long io_addr)
} }
EXPORT_SYMBOL(__iop13xx_io); EXPORT_SYMBOL(__iop13xx_io);
void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
unsigned int mtype) size_t size, unsigned int mtype, void *caller)
{ {
void __iomem * retval; void __iomem * retval;
...@@ -76,17 +78,14 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, ...@@ -76,17 +78,14 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
break; break;
default: default:
retval = __arm_ioremap_caller(cookie, size, mtype, retval = __arm_ioremap_caller(cookie, size, mtype,
__builtin_return_address(0)); caller);
} }
return retval; return retval;
} }
EXPORT_SYMBOL(__iop13xx_ioremap);
void __iop13xx_iounmap(void __iomem *addr) static void __iop13xx_iounmap(volatile void __iomem *addr)
{ {
extern void __iounmap(volatile void __iomem *addr);
if (iop13xx_atue_mem_base) if (iop13xx_atue_mem_base)
if (addr >= (void __iomem *) iop13xx_atue_mem_base && if (addr >= (void __iomem *) iop13xx_atue_mem_base &&
addr < (void __iomem *) (iop13xx_atue_mem_base + addr < (void __iomem *) (iop13xx_atue_mem_base +
...@@ -110,4 +109,9 @@ void __iop13xx_iounmap(void __iomem *addr) ...@@ -110,4 +109,9 @@ void __iop13xx_iounmap(void __iomem *addr)
skip: skip:
return; return;
} }
EXPORT_SYMBOL(__iop13xx_iounmap);
void __init iop13xx_init_early(void)
{
arch_ioremap_caller = __iop13xx_ioremap_caller;
arch_iounmap = __iop13xx_iounmap;
}
arch/arm/mach-iop13xx/iq81340mc.c
View file @ 708795cd
...@@ -92,6 +92,7 @@ static struct sys_timer iq81340mc_timer = { ...@@ -92,6 +92,7 @@ static struct sys_timer iq81340mc_timer = {
MACHINE_START(IQ81340MC, "Intel IQ81340MC") MACHINE_START(IQ81340MC, "Intel IQ81340MC")
/* Maintainer: Dan Williams <dan.j.williams@intel.com> */ /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
.atag_offset = 0x100, .atag_offset = 0x100,
.init_early = iop13xx_init_early,
.map_io = iop13xx_map_io, .map_io = iop13xx_map_io,
.init_irq = iop13xx_init_irq, .init_irq = iop13xx_init_irq,
.timer = &iq81340mc_timer, .timer = &iq81340mc_timer,
......
arch/arm/mach-iop13xx/iq81340sc.c
View file @ 708795cd
...@@ -94,6 +94,7 @@ static struct sys_timer iq81340sc_timer = { ...@@ -94,6 +94,7 @@ static struct sys_timer iq81340sc_timer = {
MACHINE_START(IQ81340SC, "Intel IQ81340SC") MACHINE_START(IQ81340SC, "Intel IQ81340SC")
/* Maintainer: Dan Williams <dan.j.williams@intel.com> */ /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
.atag_offset = 0x100, .atag_offset = 0x100,
.init_early = iop13xx_init_early,
.map_io = iop13xx_map_io, .map_io = iop13xx_map_io,
.init_irq = iop13xx_init_irq, .init_irq = iop13xx_init_irq,
.timer = &iq81340sc_timer, .timer = &iq81340sc_timer,
......
arch/arm/mach-iop13xx/pci.h 0 → 100644
View file @ 708795cd
#include <linux/types.h>
extern u32 iop13xx_atue_mem_base;
extern u32 iop13xx_atux_mem_base;
extern size_t iop13xx_atue_mem_size;
extern size_t iop13xx_atux_mem_size;
arch/arm/mach-iop32x/include/mach/io.h
View file @ 708795cd
...@@ -15,6 +15,5 @@ ...@@ -15,6 +15,5 @@
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
#define __mem_pci(a) (a)
#endif #endif
arch/arm/mach-iop33x/include/mach/io.h
View file @ 708795cd
...@@ -15,6 +15,5 @@ ...@@ -15,6 +15,5 @@
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) #define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
#define __mem_pci(a) (a)
#endif #endif
arch/arm/mach-ixp2000/include/mach/io.h
View file @ 708795cd
...@@ -18,7 +18,6 @@ ...@@ -18,7 +18,6 @@
#include <mach/hardware.h> #include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __mem_pci(a) (a)
/* /*
* The A? revisions of the IXP2000s assert byte lanes for PCI I/O * The A? revisions of the IXP2000s assert byte lanes for PCI I/O
......
arch/arm/mach-ixp23xx/include/mach/io.h
View file @ 708795cd
...@@ -18,6 +18,5 @@ ...@@ -18,6 +18,5 @@
#define IO_SPACE_LIMIT 0xffffffff #define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) #define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
#define __mem_pci(a) (a)
#endif #endif
arch/arm/mach-ixp4xx/avila-setup.c
View file @ 708795cd
...@@ -165,6 +165,7 @@ static void __init avila_init(void) ...@@ -165,6 +165,7 @@ static void __init avila_init(void)
MACHINE_START(AVILA, "Gateworks Avila Network Platform") MACHINE_START(AVILA, "Gateworks Avila Network Platform")
/* Maintainer: Deepak Saxena <dsaxena@plexity.net> */ /* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
...@@ -184,6 +185,7 @@ MACHINE_END ...@@ -184,6 +185,7 @@ MACHINE_END
MACHINE_START(LOFT, "Giant Shoulder Inc Loft board") MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
/* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */ /* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
......
arch/arm/mach-ixp4xx/common.c
View file @ 708795cd
...@@ -31,6 +31,7 @@ ...@@ -31,6 +31,7 @@
#include <mach/udc.h> #include <mach/udc.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/io.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/page.h> #include <asm/page.h>
...@@ -517,3 +518,35 @@ void ixp4xx_restart(char mode, const char *cmd) ...@@ -517,3 +518,35 @@ void ixp4xx_restart(char mode, const char *cmd)
*IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
} }
} }
#ifdef CONFIG_IXP4XX_INDIRECT_PCI
/*
* In the case of using indirect PCI, we simply return the actual PCI
* address and our read/write implementation use that to drive the
* access registers. If something outside of PCI is ioremap'd, we
* fallback to the default.
*/
static void __iomem *ixp4xx_ioremap_caller(unsigned long addr, size_t size,
unsigned int mtype, void *caller)
{
if (!is_pci_memory(addr))
return __arm_ioremap_caller(addr, size, mtype, caller);
return (void __iomem *)addr;
}
static void ixp4xx_iounmap(void __iomem *addr)
{
if (!is_pci_memory((__force u32)addr))
__iounmap(addr);
}
void __init ixp4xx_init_early(void)
{
arch_ioremap_caller = ixp4xx_ioremap_caller;
arch_iounmap = ixp4xx_iounmap;
}
#else
void __init ixp4xx_init_early(void) {}
#endif
arch/arm/mach-ixp4xx/coyote-setup.c
View file @ 708795cd
...@@ -110,6 +110,7 @@ static void __init coyote_init(void) ...@@ -110,6 +110,7 @@ static void __init coyote_init(void)
MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote") MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
/* Maintainer: MontaVista Software, Inc. */ /* Maintainer: MontaVista Software, Inc. */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
...@@ -129,6 +130,7 @@ MACHINE_END ...@@ -129,6 +130,7 @@ MACHINE_END
MACHINE_START(IXDPG425, "Intel IXDPG425") MACHINE_START(IXDPG425, "Intel IXDPG425")
/* Maintainer: MontaVista Software, Inc. */ /* Maintainer: MontaVista Software, Inc. */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
......
arch/arm/mach-ixp4xx/dsmg600-setup.c
View file @ 708795cd
...@@ -280,6 +280,7 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA") ...@@ -280,6 +280,7 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
/* Maintainer: www.nslu2-linux.org */ /* Maintainer: www.nslu2-linux.org */
.atag_offset = 0x100, .atag_offset = 0x100,
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &dsmg600_timer, .timer = &dsmg600_timer,
.init_machine = dsmg600_init, .init_machine = dsmg600_init,
......
arch/arm/mach-ixp4xx/fsg-setup.c
View file @ 708795cd
...@@ -270,6 +270,7 @@ static void __init fsg_init(void) ...@@ -270,6 +270,7 @@ static void __init fsg_init(void)
MACHINE_START(FSG, "Freecom FSG-3") MACHINE_START(FSG, "Freecom FSG-3")
/* Maintainer: www.nslu2-linux.org */ /* Maintainer: www.nslu2-linux.org */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
......
arch/arm/mach-ixp4xx/gateway7001-setup.c
View file @ 708795cd
...@@ -97,6 +97,7 @@ static void __init gateway7001_init(void) ...@@ -97,6 +97,7 @@ static void __init gateway7001_init(void)
MACHINE_START(GATEWAY7001, "Gateway 7001 AP") MACHINE_START(GATEWAY7001, "Gateway 7001 AP")
/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
......
arch/arm/mach-ixp4xx/goramo_mlr.c
View file @ 708795cd
...@@ -497,6 +497,7 @@ subsys_initcall(gmlr_pci_init); ...@@ -497,6 +497,7 @@ subsys_initcall(gmlr_pci_init);
MACHINE_START(GORAMO_MLR, "MultiLink") MACHINE_START(GORAMO_MLR, "MultiLink")
/* Maintainer: Krzysztof Halasa */ /* Maintainer: Krzysztof Halasa */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
......
arch/arm/mach-ixp4xx/gtwx5715-setup.c
View file @ 708795cd
...@@ -165,6 +165,7 @@ static void __init gtwx5715_init(void) ...@@ -165,6 +165,7 @@ static void __init gtwx5715_init(void)
MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)") MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
/* Maintainer: George Joseph */ /* Maintainer: George Joseph */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
......
arch/arm/mach-ixp4xx/include/mach/io.h
View file @ 708795cd
...@@ -39,11 +39,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); ...@@ -39,11 +39,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
* but in some cases the performance hit is acceptable. In addition, you * but in some cases the performance hit is acceptable. In addition, you
* cannot mmap() PCI devices in this case. * cannot mmap() PCI devices in this case.
*/ */
#ifndef CONFIG_IXP4XX_INDIRECT_PCI #ifdef CONFIG_IXP4XX_INDIRECT_PCI
#define __mem_pci(a) (a)
#else
/* /*
* In the case of using indirect PCI, we simply return the actual PCI * In the case of using indirect PCI, we simply return the actual PCI
...@@ -57,24 +53,6 @@ static inline int is_pci_memory(u32 addr) ...@@ -57,24 +53,6 @@ static inline int is_pci_memory(u32 addr)
return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF); return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF);
} }
static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size,
unsigned int mtype)
{
if (!is_pci_memory(addr))
return __arm_ioremap(addr, size, mtype);
return (void __iomem *)addr;
}
static inline void __indirect_iounmap(void __iomem *addr)
{
if (!is_pci_memory((__force u32)addr))
__iounmap(addr);
}
#define __arch_ioremap __indirect_ioremap
#define __arch_iounmap __indirect_iounmap
#define writeb(v, p) __indirect_writeb(v, p) #define writeb(v, p) __indirect_writeb(v, p)
#define writew(v, p) __indirect_writew(v, p) #define writew(v, p) __indirect_writew(v, p)
#define writel(v, p) __indirect_writel(v, p) #define writel(v, p) __indirect_writel(v, p)
......
arch/arm/mach-ixp4xx/include/mach/platform.h
View file @ 708795cd
...@@ -121,6 +121,7 @@ extern unsigned long ixp4xx_timer_freq; ...@@ -121,6 +121,7 @@ extern unsigned long ixp4xx_timer_freq;
* Functions used by platform-level setup code * Functions used by platform-level setup code
*/ */
extern void ixp4xx_map_io(void); extern void ixp4xx_map_io(void);
extern void ixp4xx_init_early(void);
extern void ixp4xx_init_irq(void); extern void ixp4xx_init_irq(void);
extern void ixp4xx_sys_init(void); extern void ixp4xx_sys_init(void);
extern void ixp4xx_timer_init(void); extern void ixp4xx_timer_init(void);
......
arch/arm/mach-ixp4xx/ixdp425-setup.c
View file @ 708795cd
...@@ -254,6 +254,7 @@ static void __init ixdp425_init(void) ...@@ -254,6 +254,7 @@ static void __init ixdp425_init(void)
MACHINE_START(IXDP425, "Intel IXDP425 Development Platform") MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
/* Maintainer: MontaVista Software, Inc. */ /* Maintainer: MontaVista Software, Inc. */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
...@@ -269,6 +270,7 @@ MACHINE_END ...@@ -269,6 +270,7 @@ MACHINE_END
MACHINE_START(IXDP465, "Intel IXDP465 Development Platform") MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
/* Maintainer: MontaVista Software, Inc. */ /* Maintainer: MontaVista Software, Inc. */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
...@@ -283,6 +285,7 @@ MACHINE_END ...@@ -283,6 +285,7 @@ MACHINE_END
MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform") MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
/* Maintainer: MontaVista Software, Inc. */ /* Maintainer: MontaVista Software, Inc. */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
...@@ -297,6 +300,7 @@ MACHINE_END ...@@ -297,6 +300,7 @@ MACHINE_END
MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform") MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
/* Maintainer: MontaVista Software, Inc. */ /* Maintainer: MontaVista Software, Inc. */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
......
arch/arm/mach-ixp4xx/nas100d-setup.c
View file @ 708795cd
...@@ -315,6 +315,7 @@ MACHINE_START(NAS100D, "Iomega NAS 100d") ...@@ -315,6 +315,7 @@ MACHINE_START(NAS100D, "Iomega NAS 100d")
/* Maintainer: www.nslu2-linux.org */ /* Maintainer: www.nslu2-linux.org */
.atag_offset = 0x100, .atag_offset = 0x100,
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.init_machine = nas100d_init, .init_machine = nas100d_init,
......
arch/arm/mach-ixp4xx/nslu2-setup.c
View file @ 708795cd
...@@ -301,6 +301,7 @@ MACHINE_START(NSLU2, "Linksys NSLU2") ...@@ -301,6 +301,7 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
/* Maintainer: www.nslu2-linux.org */ /* Maintainer: www.nslu2-linux.org */
.atag_offset = 0x100, .atag_offset = 0x100,
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &nslu2_timer, .timer = &nslu2_timer,
.init_machine = nslu2_init, .init_machine = nslu2_init,
......
arch/arm/mach-ixp4xx/omixp-setup.c
View file @ 708795cd
...@@ -243,6 +243,7 @@ static void __init omixp_init(void) ...@@ -243,6 +243,7 @@ static void __init omixp_init(void)
MACHINE_START(DEVIXP, "Omicron DEVIXP") MACHINE_START(DEVIXP, "Omicron DEVIXP")
.atag_offset = 0x100, .atag_offset = 0x100,
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.init_machine = omixp_init, .init_machine = omixp_init,
...@@ -254,6 +255,7 @@ MACHINE_END ...@@ -254,6 +255,7 @@ MACHINE_END
MACHINE_START(MICCPT, "Omicron MICCPT") MACHINE_START(MICCPT, "Omicron MICCPT")
.atag_offset = 0x100, .atag_offset = 0x100,
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.init_machine = omixp_init, .init_machine = omixp_init,
...@@ -268,6 +270,7 @@ MACHINE_END ...@@ -268,6 +270,7 @@ MACHINE_END
MACHINE_START(MIC256, "Omicron MIC256") MACHINE_START(MIC256, "Omicron MIC256")
.atag_offset = 0x100, .atag_offset = 0x100,
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.init_machine = omixp_init, .init_machine = omixp_init,
......
arch/arm/mach-ixp4xx/vulcan-setup.c
View file @ 708795cd
...@@ -237,6 +237,7 @@ static void __init vulcan_init(void) ...@@ -237,6 +237,7 @@ static void __init vulcan_init(void)
MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan") MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
/* Maintainer: Marc Zyngier <maz@misterjones.org> */ /* Maintainer: Marc Zyngier <maz@misterjones.org> */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
......
arch/arm/mach-ixp4xx/wg302v2-setup.c
View file @ 708795cd
...@@ -98,6 +98,7 @@ static void __init wg302v2_init(void) ...@@ -98,6 +98,7 @@ static void __init wg302v2_init(void)
MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2") MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
.map_io = ixp4xx_map_io, .map_io = ixp4xx_map_io,
.init_early = ixp4xx_init_early,
.init_irq = ixp4xx_init_irq, .init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer, .timer = &ixp4xx_timer,
.atag_offset = 0x100, .atag_offset = 0x100,
......
arch/arm/mach-kirkwood/include/mach/io.h
View file @ 708795cd
...@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr) ...@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
} }
#define __io(a) __io(a) #define __io(a) __io(a)
#define __mem_pci(a) (a)
#endif #endif
arch/arm/mach-ks8695/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-ks8695/include/mach/io.h
*
* Copyright (C) 2006 Andrew Victor
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-lpc32xx/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-lpc32xx/include/mach/io.h
*
* Author: Kevin Wells <kevin.wells@nxp.com>
*
* Copyright (C) 2010 NXP Semiconductors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-mmp/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* linux/arch/arm/mach-mmp/include/mach/io.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_MACH_IO_H
#define __ASM_MACH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif /* __ASM_MACH_IO_H */
arch/arm/mach-msm/board-halibut.c
View file @ 708795cd
...@@ -68,6 +68,11 @@ static struct platform_device *devices[] __initdata = { ...@@ -68,6 +68,11 @@ static struct platform_device *devices[] __initdata = {
extern struct sys_timer msm_timer; extern struct sys_timer msm_timer;
static void __init halibut_init_early(void)
{
arch_ioremap_caller = __msm_ioremap_caller;
}
static void __init halibut_init_irq(void) static void __init halibut_init_irq(void)
{ {
msm_init_irq(); msm_init_irq();
...@@ -96,6 +101,7 @@ MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") ...@@ -96,6 +101,7 @@ MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
.atag_offset = 0x100, .atag_offset = 0x100,
.fixup = halibut_fixup, .fixup = halibut_fixup,
.map_io = halibut_map_io, .map_io = halibut_map_io,
.init_early = halibut_init_early,
.init_irq = halibut_init_irq, .init_irq = halibut_init_irq,
.init_machine = halibut_init, .init_machine = halibut_init,
.timer = &msm_timer, .timer = &msm_timer,
......
arch/arm/mach-msm/board-trout.c
View file @ 708795cd
...@@ -43,6 +43,11 @@ static struct platform_device *devices[] __initdata = { ...@@ -43,6 +43,11 @@ static struct platform_device *devices[] __initdata = {
extern struct sys_timer msm_timer; extern struct sys_timer msm_timer;
static void __init trout_init_early(void)
{
arch_ioremap_caller = __msm_ioremap_caller;
}
static void __init trout_init_irq(void) static void __init trout_init_irq(void)
{ {
msm_init_irq(); msm_init_irq();
...@@ -96,6 +101,7 @@ MACHINE_START(TROUT, "HTC Dream") ...@@ -96,6 +101,7 @@ MACHINE_START(TROUT, "HTC Dream")
.atag_offset = 0x100, .atag_offset = 0x100,
.fixup = trout_fixup, .fixup = trout_fixup,
.map_io = trout_map_io, .map_io = trout_map_io,
.init_early = trout_init_early,
.init_irq = trout_init_irq, .init_irq = trout_init_irq,
.init_machine = trout_init, .init_machine = trout_init,
.timer = &msm_timer, .timer = &msm_timer,
......
arch/arm/mach-msm/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/* arch/arm/mach-msm/include/mach/io.h
*
* Copyright (C) 2007 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __arch_ioremap __msm_ioremap
#define __arch_iounmap __iounmap
void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
void msm_map_qsd8x50_io(void);
void msm_map_msm7x30_io(void);
void msm_map_msm8x60_io(void);
void msm_map_msm8960_io(void);
extern unsigned int msm_shared_ram_phys;
#endif
arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
View file @ 708795cd
...@@ -111,5 +111,11 @@ ...@@ -111,5 +111,11 @@
#define MSM_AD5_PHYS 0xAC000000 #define MSM_AD5_PHYS 0xAC000000
#define MSM_AD5_SIZE (SZ_1M*13) #define MSM_AD5_SIZE (SZ_1M*13)
#ifndef __ASSEMBLY__
extern void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
unsigned int mtype, void *caller);
#endif
#endif #endif
arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
View file @ 708795cd
...@@ -100,4 +100,8 @@ ...@@ -100,4 +100,8 @@
#define MSM_HSUSB_PHYS 0xA3600000 #define MSM_HSUSB_PHYS 0xA3600000
#define MSM_HSUSB_SIZE SZ_1K #define MSM_HSUSB_SIZE SZ_1K
#ifndef __ASSEMBLY__
extern void msm_map_msm7x30_io(void);
#endif
#endif #endif
arch/arm/mach-msm/include/mach/msm_iomap-8960.h
View file @ 708795cd
...@@ -50,4 +50,8 @@ ...@@ -50,4 +50,8 @@
#define MSM_DEBUG_UART_PHYS 0x16440000 #define MSM_DEBUG_UART_PHYS 0x16440000
#endif #endif
#ifndef __ASSEMBLY__
extern void msm_map_msm8960_io(void);
#endif
#endif #endif
arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
View file @ 708795cd
...@@ -122,4 +122,8 @@ ...@@ -122,4 +122,8 @@
#define MSM_SDC4_PHYS 0xA0600000 #define MSM_SDC4_PHYS 0xA0600000
#define MSM_SDC4_SIZE SZ_4K #define MSM_SDC4_SIZE SZ_4K
#ifndef __ASSEMBLY__
extern void msm_map_qsd8x50_io(void);
#endif
#endif #endif
arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
View file @ 708795cd
...@@ -67,4 +67,8 @@ ...@@ -67,4 +67,8 @@
#define MSM_DEBUG_UART_PHYS 0x19C40000 #define MSM_DEBUG_UART_PHYS 0x19C40000
#endif #endif
#ifndef __ASSEMBLY__
extern void msm_map_msm8x60_io(void);
#endif
#endif #endif
arch/arm/mach-msm/io.c
View file @ 708795cd
...@@ -172,8 +172,8 @@ void __init msm_map_msm7x30_io(void) ...@@ -172,8 +172,8 @@ void __init msm_map_msm7x30_io(void)
} }
#endif /* CONFIG_ARCH_MSM7X30 */ #endif /* CONFIG_ARCH_MSM7X30 */
void __iomem * void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) unsigned int mtype, void *caller)
{ {
if (mtype == MT_DEVICE) { if (mtype == MT_DEVICE) {
/* The peripherals in the 88000000 - D0000000 range /* The peripherals in the 88000000 - D0000000 range
...@@ -184,7 +184,5 @@ __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) ...@@ -184,7 +184,5 @@ __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
mtype = MT_DEVICE_NONSHARED; mtype = MT_DEVICE_NONSHARED;
} }
return __arm_ioremap_caller(phys_addr, size, mtype, return __arm_ioremap_caller(phys_addr, size, mtype, caller);
__builtin_return_address(0));
} }
EXPORT_SYMBOL(__msm_ioremap);
arch/arm/mach-mv78xx0/include/mach/io.h
View file @ 708795cd
...@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr) ...@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
} }
#define __io(a) __io(a) #define __io(a) __io(a)
#define __mem_pci(a) (a)
#endif #endif
arch/arm/mach-mxs/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __MACH_MXS_IO_H__
#define __MACH_MXS_IO_H__
/* Allow IO space to be anywhere in the memory */
#define IO_SPACE_LIMIT 0xffffffff
/* io address mapping macro */
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif /* __MACH_MXS_IO_H__ */
arch/arm/mach-netx/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-netx/include/mach/io.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-nomadik/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-nomadik/include/mach/io.h (copied from mach-sa1100)
*
* Copyright (C) 1997-1999 Russell King
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-omap1/include/mach/entry-macro.S
View file @ 708795cd
...@@ -11,7 +11,6 @@ ...@@ -11,7 +11,6 @@
*/ */
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/io.h>
#include <mach/irqs.h> #include <mach/irqs.h>
#include "../../iomap.h" #include "../../iomap.h"
......
arch/arm/mach-omap1/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-omap1/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-omap1/sleep.S
View file @ 708795cd
...@@ -36,8 +36,6 @@ ...@@ -36,8 +36,6 @@
#include <asm/assembler.h> #include <asm/assembler.h>
#include <mach/io.h>
#include "iomap.h" #include "iomap.h"
#include "pm.h" #include "pm.h"
......
arch/arm/mach-omap1/sram.S
View file @ 708795cd
...@@ -12,7 +12,6 @@ ...@@ -12,7 +12,6 @@
#include <asm/assembler.h> #include <asm/assembler.h>
#include <mach/io.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include "iomap.h" #include "iomap.h"
......
arch/arm/mach-omap2/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-omap2/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-orion5x/common.h
View file @ 708795cd
...@@ -57,5 +57,14 @@ struct meminfo; ...@@ -57,5 +57,14 @@ struct meminfo;
struct tag; struct tag;
extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *); extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
/*****************************************************************************
* Helpers to access Orion registers
****************************************************************************/
/*
* These are not preempt-safe. Locks, if needed, must be taken
* care of by the caller.
*/
#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r))
#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
#endif #endif
arch/arm/mach-orion5x/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-orion5x/include/mach/io.h
*
* Tzachi Perelstein <tzachi@marvell.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#include "orion5x.h"
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
/*****************************************************************************
* Helpers to access Orion registers
****************************************************************************/
/*
* These are not preempt-safe. Locks, if needed, must be taken
* care of by the caller.
*/
#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r))
#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
#endif
arch/arm/mach-orion5x/pci.c
View file @ 708795cd
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#include <asm/mach/pci.h> #include <asm/mach/pci.h>
#include <plat/pcie.h> #include <plat/pcie.h>
#include <plat/addr-map.h> #include <plat/addr-map.h>
#include <mach/orion5x.h>
#include "common.h" #include "common.h"
/***************************************************************************** /*****************************************************************************
......
arch/arm/mach-orion5x/tsx09-common.c
View file @ 708795cd
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <linux/mv643xx_eth.h> #include <linux/mv643xx_eth.h>
#include <linux/timex.h> #include <linux/timex.h>
#include <linux/serial_reg.h> #include <linux/serial_reg.h>
#include <mach/orion5x.h>
#include "tsx09-common.h" #include "tsx09-common.h"
#include "common.h" #include "common.h"
......
arch/arm/mach-picoxcell/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
/* No ioports, but needed for driver compatibility. */
#define __io(a) __typesafe_io(a)
/* No PCI possible on picoxcell. */
#define __mem_pci(a) (a)
#endif /* __ASM_ARM_ARCH_IO_H */
arch/arm/mach-pnx4008/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-pnx4008/include/mach/io.h
*
* Author: Dmitry Chigirev <chigirev@ru.mvista.com>
*
* 2005 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-prima2/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-prima2/include/mach/io.h
*
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
#ifndef __MACH_PRIMA2_IO_H
#define __MACH_PRIMA2_IO_H
#define IO_SPACE_LIMIT ((resource_size_t)0)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-pxa/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-pxa/include/mach/io.h
*
* Copied from asm/arch/sa1100/io.h
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-realview/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-realview/include/mach/io.h
*
* Copyright (C) 2003 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-rpc/include/mach/io.h
View file @ 708795cd
...@@ -28,9 +28,4 @@ ...@@ -28,9 +28,4 @@
*/ */
#define __io(a) (PCIO_BASE + ((a) << 2)) #define __io(a) (PCIO_BASE + ((a) << 2))
/*
* 1:1 mapping for ioremapped regions.
*/
#define __mem_pci(x) (x)
#endif #endif
arch/arm/mach-s3c2410/include/mach/io.h
View file @ 708795cd
...@@ -208,9 +208,4 @@ DECLARE_IO(int,l,"") ...@@ -208,9 +208,4 @@ DECLARE_IO(int,l,"")
#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) #define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
#define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l) #define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l)
/*
* 1:1 mapping for ioremapped regions.
*/
#define __mem_pci(x) (x)
#endif #endif
arch/arm/mach-s3c64xx/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/* arch/arm/mach-s3c64xxinclude/mach/io.h
*
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben-linux@fluff.org>
*
* Default IO routines for S3C64XX based
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
/* No current ISA/PCI bus support. */
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#define IO_SPACE_LIMIT (0xFFFFFFFF)
#endif
arch/arm/mach-s5p64x0/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/* linux/arch/arm/mach-s5p64x0/include/mach/io.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben-linux@fluff.org>
*
* Default IO routines for S5P64X0 based
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
/* No current ISA/PCI bus support. */
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#define IO_SPACE_LIMIT (0xFFFFFFFF)
#endif
arch/arm/mach-s5pc100/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/* arch/arm/mach-s5pc100/include/mach/io.h
*
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben-linux@fluff.org>
*
* Default IO routines for S5PC100 systems
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
/* No current ISA/PCI bus support. */
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#define IO_SPACE_LIMIT (0xFFFFFFFF)
#endif
arch/arm/mach-s5pv210/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/* linux/arch/arm/mach-s5pv210/include/mach/io.h
*
* Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* Based on arch/arm/mach-s5p6442/include/mach/io.h
*
* Default IO routines for S5PV210
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H __FILE__
/* No current ISA/PCI bus support. */
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#define IO_SPACE_LIMIT (0xFFFFFFFF)
#endif /* __ASM_ARM_ARCH_IO_H */
arch/arm/mach-sa1100/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-sa1100/include/mach/io.h
*
* Copyright (C) 1997-1999 Russell King
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
/*
* __io() is required to be an equivalent mapping to __mem_pci() for
* SOC_COMMON to work.
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-shark/include/mach/io.h
View file @ 708795cd
...@@ -15,6 +15,4 @@ ...@@ -15,6 +15,4 @@
#define __io(a) ((void __iomem *)(0xe0000000 + (a))) #define __io(a) ((void __iomem *)(0xe0000000 + (a)))
#define __mem_pci(addr) (addr)
#endif #endif
arch/arm/mach-shmobile/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
#ifndef __ASM_MACH_IO_H
#define __ASM_MACH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#endif /* __ASM_MACH_IO_H */
arch/arm/mach-spear3xx/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-spear3xx/include/mach/io.h
*
* IO definitions for SPEAr3xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Viresh Kumar<viresh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_IO_H
#define __MACH_IO_H
#include <plat/io.h>
#endif /* __MACH_IO_H */
arch/arm/mach-spear6xx/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-spear6xx/include/mach/io.h
*
* IO definitions for SPEAr6xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Rajeev Kumar Kumar<rajeev-dlh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_IO_H
#define __MACH_IO_H
#include <plat/io.h>
#endif /* __MACH_IO_H */
arch/arm/mach-tegra/include/mach/debug-macro.S
View file @ 708795cd
...@@ -18,7 +18,6 @@ ...@@ -18,7 +18,6 @@
* *
*/ */
#include <mach/io.h>
#include <mach/iomap.h> #include <mach/iomap.h>
.macro addruart, rp, rv, tmp .macro addruart, rp, rv, tmp
......
arch/arm/mach-tegra/include/mach/io.h
View file @ 708795cd
...@@ -23,56 +23,8 @@ ...@@ -23,56 +23,8 @@
#define IO_SPACE_LIMIT 0xffff #define IO_SPACE_LIMIT 0xffff
/* On TEGRA, many peripherals are very closely packed in
* two 256MB io windows (that actually only use about 64KB
* at the start of each).
*
* We will just map the first 1MB of each window (to minimize
* pt entries needed) and provide a macro to transform physical
* io addresses to an appropriate void __iomem *.
*
*/
#ifdef __ASSEMBLY__
#define IOMEM(x) (x)
#else
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
#define IO_IRAM_PHYS 0x40000000
#define IO_IRAM_VIRT IOMEM(0xFE400000)
#define IO_IRAM_SIZE SZ_256K
#define IO_CPU_PHYS 0x50040000
#define IO_CPU_VIRT IOMEM(0xFE000000)
#define IO_CPU_SIZE SZ_16K
#define IO_PPSB_PHYS 0x60000000
#define IO_PPSB_VIRT IOMEM(0xFE200000)
#define IO_PPSB_SIZE SZ_1M
#define IO_APB_PHYS 0x70000000
#define IO_APB_VIRT IOMEM(0xFE300000)
#define IO_APB_SIZE SZ_1M
#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
#define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst)))
#define IO_TO_VIRT(n) ( \
IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) : \
IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \
IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \
IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \
NULL)
#ifndef __ASSEMBLER__ #ifndef __ASSEMBLER__
#define IO_ADDRESS(n) (IO_TO_VIRT(n))
#ifdef CONFIG_TEGRA_PCI #ifdef CONFIG_TEGRA_PCI
extern void __iomem *tegra_pcie_io_base; extern void __iomem *tegra_pcie_io_base;
...@@ -88,7 +40,6 @@ static inline void __iomem *__io(unsigned long addr) ...@@ -88,7 +40,6 @@ static inline void __iomem *__io(unsigned long addr)
#endif #endif
#define __io(a) __io(a) #define __io(a) __io(a)
#define __mem_pci(a) (a)
#endif #endif
......
arch/arm/mach-tegra/include/mach/iomap.h
View file @ 708795cd
...@@ -271,4 +271,52 @@ ...@@ -271,4 +271,52 @@
# define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE # define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE
#endif #endif
/* On TEGRA, many peripherals are very closely packed in
* two 256MB io windows (that actually only use about 64KB
* at the start of each).
*
* We will just map the first 1MB of each window (to minimize
* pt entries needed) and provide a macro to transform physical
* io addresses to an appropriate void __iomem *.
*
*/
#ifdef __ASSEMBLY__
#define IOMEM(x) (x)
#else
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
#define IO_IRAM_PHYS 0x40000000
#define IO_IRAM_VIRT IOMEM(0xFE400000)
#define IO_IRAM_SIZE SZ_256K
#define IO_CPU_PHYS 0x50040000
#define IO_CPU_VIRT IOMEM(0xFE000000)
#define IO_CPU_SIZE SZ_16K
#define IO_PPSB_PHYS 0x60000000
#define IO_PPSB_VIRT IOMEM(0xFE200000)
#define IO_PPSB_SIZE SZ_1M
#define IO_APB_PHYS 0x70000000
#define IO_APB_VIRT IOMEM(0xFE300000)
#define IO_APB_SIZE SZ_1M
#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
#define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst)))
#define IO_TO_VIRT(n) ( \
IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) : \
IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) : \
IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \
IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \
IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \
NULL)
#define IO_ADDRESS(n) (IO_TO_VIRT(n))
#endif #endif
arch/arm/mach-tegra/io.c
View file @ 708795cd
...@@ -26,6 +26,7 @@ ...@@ -26,6 +26,7 @@
#include <asm/page.h> #include <asm/page.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <mach/iomap.h>
#include "board.h" #include "board.h"
......
arch/arm/mach-u300/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
*
* arch/arm/mach-u300/include/mach/io.h
*
*
* Copyright (C) 2006-2009 ST-Ericsson AB
* License terms: GNU General Public License (GPL) version 2
* Dummy IO map for being able to use writew()/readw(),
* writel()/readw() and similar accessor functions.
* Author: Linus Walleij <linus.walleij@stericsson.com>
*/
#ifndef __MACH_IO_H
#define __MACH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-ux500/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-u8500/include/mach/io.h
*
* Copyright (C) 1997-1999 Russell King
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-versatile/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-versatile/include/mach/io.h
*
* Copyright (C) 2003 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-vexpress/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-vexpress/include/mach/io.h
*
* Copyright (C) 2003 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-vt8500/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-vt8500/include/mach/io.h
*
* Copyright (C) 2010 Alexey Charkov
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define __io(a) __typesafe_io((a) + 0xf0000000)
#define __mem_pci(a) (a)
#endif
arch/arm/mach-w90x900/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
/*
* arch/arm/mach-w90x900/include/mach/io.h
*
* Copyright (c) 2008 Nuvoton technology corporation
* All rights reserved.
*
* Wan ZongShun <mcuos.com@gmail.com>
*
* Based on arch/arm/mach-s3c2410/include/mach/io.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* 1:1 mapping for ioremapped regions.
*/
#define __mem_pci(a) (a)
#define __io(a) __typesafe_io(a)
#endif
arch/arm/mach-zynq/include/mach/io.h deleted 100644 → 0
View file @ d50673ed
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arch/arm/mm/ioremap.c
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arch/arm/plat-mxc/include/mach/hardware.h
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arch/arm/plat-mxc/include/mach/io.h deleted 100644 → 0
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arch/arm/plat-omap/include/plat/sdrc.h
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arch/arm/plat-spear/include/plat/io.h deleted 100644 → 0
View file @ d50673ed
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drivers/media/video/davinci/vpbe_osd.c
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drivers/media/video/davinci/vpbe_venc.c
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drivers/usb/host/ohci-pxa27x.c
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drivers/video/omap2/vrfb.c
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