Commit 71076a71 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Greg Kroah-Hartman

arm64: dts: renesas: condor: switch from EtherAVB to GEther

[ Upstream commit eab53fdf ]

The "official" Condor boards have always been wired to mount NFS via
GEther, not EtherAVB -- the boards resoldered for EtherAVB were local
to Cogent Embedded, so we've been having an unpleasant situation where
a "normal" Condor board still can't mount NFS (unless an EtherAVB PHY
extension board is plugged in). Switch from EtherAVB to GEther at last!

Fixes: 8091788f ("arm64: dts: renesas: condor: add EtherAVB support")
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 9edc40fd
...@@ -15,7 +15,7 @@ / { ...@@ -15,7 +15,7 @@ / {
aliases { aliases {
serial0 = &scif0; serial0 = &scif0;
ethernet0 = &avb; ethernet0 = &gether;
}; };
chosen { chosen {
...@@ -47,23 +47,6 @@ vddq_vin01: regulator-1 { ...@@ -47,23 +47,6 @@ vddq_vin01: regulator-1 {
}; };
}; };
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
renesas,no-ether-link;
status = "okay";
phy0: ethernet-phy@0 {
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
};
};
&canfd { &canfd {
pinctrl-0 = <&canfd0_pins>; pinctrl-0 = <&canfd0_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -82,6 +65,23 @@ &extalr_clk { ...@@ -82,6 +65,23 @@ &extalr_clk {
clock-frequency = <32768>; clock-frequency = <32768>;
}; };
&gether {
pinctrl-0 = <&gether_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
renesas,no-ether-link;
status = "okay";
phy0: ethernet-phy@0 {
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio4>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c0 { &i2c0 {
pinctrl-0 = <&i2c0_pins>; pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -118,16 +118,17 @@ &mmc0 { ...@@ -118,16 +118,17 @@ &mmc0 {
}; };
&pfc { &pfc {
avb_pins: avb {
groups = "avb_mdio", "avb_rgmii";
function = "avb";
};
canfd0_pins: canfd0 { canfd0_pins: canfd0 {
groups = "canfd0_data_a"; groups = "canfd0_data_a";
function = "canfd0"; function = "canfd0";
}; };
gether_pins: gether {
groups = "gether_mdio_a", "gether_rgmii",
"gether_txcrefclk", "gether_txcrefclk_mega";
function = "gether";
};
i2c0_pins: i2c0 { i2c0_pins: i2c0 {
groups = "i2c0"; groups = "i2c0";
function = "i2c0"; function = "i2c0";
......
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