Commit 715084ec authored by Aswath Govindraju's avatar Aswath Govindraju Committed by Vignesh Raghavendra

arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe

x1 lane PCIe slot in the common processor board is enabled and connected to
J721S2 SOM. Add PCIe DT node in common processor board to reflect the
same.
Reviewed-by: default avatarSiddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: default avatarAswath Govindraju <a-govindraju@ti.com>
Signed-off-by: default avatarMatt Ranostay <mranostay@ti.com>
Signed-off-by: default avatarRavi Gunasekaran <r-gunasekaran@ti.com>
Reviewed-by: default avatarRoger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230331090028.8373-9-r-gunasekaran@ti.comSigned-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent b6f18aa8
...@@ -400,6 +400,14 @@ flash@0{ ...@@ -400,6 +400,14 @@ flash@0{
}; };
}; };
&pcie1_rc {
status = "okay";
reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
phys = <&serdes0_pcie_link>;
phy-names = "pcie-phy";
num-lanes = <1>;
};
&mcu_mcan0 { &mcu_mcan0 {
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
......
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