Commit 72635e22 authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 661e5f8d 41acbfd6
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.10-rc2
# Mon Nov 15 15:29:42 2004
# Linux kernel version: 2.6.11-rc1-bk5
# Tue Jan 18 11:36:49 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_IOMAP=y
#
......@@ -123,11 +124,19 @@ CONFIG_CPU_TLB_V4WBI=y
#
# General setup
#
# CONFIG_ZBOOT_ROM is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
# CONFIG_XIP_KERNEL is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PC-card bridges
#
#
# At least one math emulation must be selected
#
......@@ -143,6 +152,7 @@ CONFIG_BINFMT_AOUT=y
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
CONFIG_PM=y
# CONFIG_PREEMPT is not set
......@@ -168,6 +178,7 @@ CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
CONFIG_MTD_CMDLINE_PARTS=y
......@@ -200,13 +211,15 @@ CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_AMDSTD_RETRY=0
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
CONFIG_MTD_ROM=y
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set
# CONFIG_MTD_XIP is not set
#
# Mapping drivers for chip access
......@@ -226,6 +239,7 @@ CONFIG_MTD_BAST_MAXSIZE=4
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
......@@ -244,6 +258,7 @@ CONFIG_MTD_NAND_S3C2410=y
# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
# CONFIG_MTD_NAND_S3C2410_HWECC is not set
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_NAND_NANDSIM is not set
#
# Plug and Play support
......@@ -254,10 +269,12 @@ CONFIG_MTD_NAND_S3C2410=y
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
......@@ -270,6 +287,7 @@ CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
CONFIG_ATA_OVER_ETH=m
#
# Multi-device support (RAID and LVM)
......@@ -456,6 +474,7 @@ CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PARKBD is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
#
......@@ -489,6 +508,7 @@ CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_DIGI is not set
# CONFIG_MOXA_INTELLIO is not set
# CONFIG_MOXA_SMARTIO is not set
# CONFIG_ISI is not set
# CONFIG_SYNCLINKMP is not set
# CONFIG_N_HDLC is not set
# CONFIG_RISCOM8 is not set
......@@ -583,6 +603,7 @@ CONFIG_I2C_S3C2410=y
CONFIG_I2C_SENSOR=m
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_DS1621 is not set
......@@ -600,6 +621,7 @@ CONFIG_SENSORS_LM85=m
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83L785TS is not set
......@@ -693,6 +715,7 @@ CONFIG_JFFS_FS_VERBOSE=0
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
# CONFIG_JFFS2_FS_NAND is not set
# CONFIG_JFFS2_FS_NOR_ECC is not set
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
......@@ -812,6 +835,7 @@ CONFIG_DUMMY_CONSOLE=y
# Logo configuration
#
# CONFIG_LOGO is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
......@@ -829,6 +853,10 @@ CONFIG_DUMMY_CONSOLE=y
CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
#
#
# USB Gadget Support
#
......@@ -848,8 +876,9 @@ CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
......@@ -870,6 +899,10 @@ CONFIG_DEBUG_S3C2410_UART=0
#
# CONFIG_CRYPTO is not set
#
# Hardware crypto devices
#
#
# Library routines
#
......
......@@ -171,22 +171,9 @@ static unsigned next_jiffy_time;
unsigned long ixp2000_gettimeoffset (void)
{
unsigned long elapsed1, elapsed2, pending;
unsigned long offset;
elapsed1 = *IXP2000_T1_CSR;
pending = (*IXP2000_IRQ_STATUS & IRQ_MASK_TIMER1);
elapsed2 = *IXP2000_T1_CSR;
offset = ticks_per_jiffy - elapsed2;
/*
* We have two cases to cover, one where we were pending
* already, and another where it overflowed while we were
* checking the timers.
*/
if ((elapsed2 > elapsed1) || pending)
offset += ticks_per_jiffy;
offset = next_jiffy_time - *IXP2000_T4_CSR;
return offset / ticks_per_usec;
}
......
......@@ -18,6 +18,7 @@
#include <linux/major.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/mmc/host.h>
#include <asm/setup.h>
#include <asm/memory.h>
......@@ -32,19 +33,18 @@
#include <asm/arch/pxa-regs.h>
#include <asm/arch/irq.h>
#include <asm/arch/mmc.h>
#include <asm/arch/corgi.h>
#include <asm/hardware/scoop.h>
#include <video/w100fb.h>
#include "generic.h"
extern void corgi_ssp_lcdtg_send (u8 adrs, u8 data);
static void __init corgi_init_irq(void)
{
pxa_init_irq();
}
/*
* Corgi SCOOP Device
*/
static struct resource corgi_scoop_resources[] = {
[0] = {
.start = 0x10800000,
......@@ -68,19 +68,139 @@ static struct platform_device corgiscoop_device = {
.resource = corgi_scoop_resources,
};
/*
* Corgi SSP Device
*
* Set the parent as the scoop device because a lot of SSP devices
* also use scoop functions and this makes the power up/down order
* work correctly.
*/
extern void corgi_ssp_lcdtg_send (u8 adrs, u8 data);
static struct platform_device corgissp_device = {
.name = "corgi-ssp",
.dev = {
.parent = &corgiscoop_device.dev,
},
.id = -1,
};
/*
* Corgi w100 Frame Buffer Device
*/
static struct w100fb_mach_info corgi_fb_info = {
.w100fb_ssp_send = corgi_ssp_lcdtg_send,
.comadj = -1,
.phadadj = -1,
};
static struct resource corgi_fb_resources[] = {
[0] = {
.start = 0x08000000,
.end = 0x08ffffff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device corgifb_device = {
.name = "w100fb",
.id = -1,
.dev = {
.platform_data = &corgi_fb_info,
.parent = &corgissp_device.dev,
},
.num_resources = ARRAY_SIZE(corgi_fb_resources),
.resource = corgi_fb_resources,
};
/*
* MMC/SD Device
*
* The card detect interrupt isn't debounced so we delay it by HZ/4
* to give the card a chance to fully insert/eject.
*/
static struct mmc_detect {
struct timer_list detect_timer;
void *devid;
} mmc_detect;
static void mmc_detect_callback(unsigned long data)
{
mmc_detect_change(mmc_detect.devid);
}
static irqreturn_t corgi_mmc_detect_int(int irq, void *devid, struct pt_regs *regs)
{
mmc_detect.devid=devid;
mod_timer(&mmc_detect.detect_timer, jiffies + HZ/4);
return IRQ_HANDLED;
}
static int corgi_mci_init(struct device *dev, irqreturn_t (*unused_detect_int)(int, void *, struct pt_regs *), void *data)
{
int err;
/* setup GPIO for PXA25x MMC controller */
pxa_gpio_mode(GPIO6_MMCCLK_MD);
pxa_gpio_mode(GPIO8_MMCCS0_MD);
pxa_gpio_mode(CORGI_GPIO_nSD_DETECT | GPIO_IN);
pxa_gpio_mode(CORGI_GPIO_SD_PWR | GPIO_OUT);
err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_mmc_detect_int, SA_INTERRUPT,
"MMC card detect", data);
if (err) {
printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
return -1;
}
init_timer(&mmc_detect.detect_timer);
mmc_detect.detect_timer.function = mmc_detect_callback;
mmc_detect.detect_timer.data = (unsigned long) &mmc_detect;
set_irq_type(CORGI_IRQ_GPIO_nSD_DETECT, IRQT_BOTHEDGE);
return 0;
}
static void corgi_mci_setpower(struct device *dev, unsigned int vdd)
{
struct pxamci_platform_data* p_d = dev->platform_data;
if (( 1 << vdd) & p_d->ocr_mask) {
printk(KERN_DEBUG "%s: on\n", __FUNCTION__);
GPSR1 = GPIO_bit(CORGI_GPIO_SD_PWR);
} else {
printk(KERN_DEBUG "%s: off\n", __FUNCTION__);
GPCR1 = GPIO_bit(CORGI_GPIO_SD_PWR);
}
}
static void corgi_mci_exit(struct device *dev, void *data)
{
free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data);
del_timer(&mmc_detect.detect_timer);
}
static struct pxamci_platform_data corgi_mci_platform_data = {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init = corgi_mci_init,
.setpower = corgi_mci_setpower,
.exit = corgi_mci_exit,
};
static struct platform_device *devices[] __initdata = {
&corgiscoop_device,
&corgissp_device,
&corgifb_device,
};
static struct sharpsl_flash_param_info sharpsl_flash_param;
void corgi_get_param(void)
static void corgi_get_param(void)
{
sharpsl_flash_param.comadj_keyword = readl(FLASH_MEM_BASE + FLASH_COMADJ_MAGIC_ADR);
sharpsl_flash_param.comadj = readl(FLASH_MEM_BASE + FLASH_COMADJ_DATA_ADR);
......@@ -91,6 +211,18 @@ void corgi_get_param(void)
static void __init corgi_init(void)
{
if (sharpsl_flash_param.comadj_keyword == FLASH_COMADJ_MAJIC)
corgi_fb_info.comadj=sharpsl_flash_param.comadj;
else
corgi_fb_info.comadj=-1;
if (sharpsl_flash_param.phad_keyword == FLASH_PHAD_MAJIC)
corgi_fb_info.phadadj=sharpsl_flash_param.phadadj;
else
corgi_fb_info.phadadj=-1;
pxa_set_mci_info(&corgi_mci_platform_data);
platform_add_devices(devices, ARRAY_SIZE(devices));
}
......@@ -107,6 +239,11 @@ static void __init fixup_corgi(struct machine_desc *desc,
mi->bank[0].size = (64*1024*1024);
}
static void __init corgi_init_irq(void)
{
pxa_init_irq();
}
static struct map_desc corgi_io_desc[] __initdata = {
/* virtual physical length */
/* { 0xf1000000, 0x08000000, 0x01000000, MT_DEVICE },*/ /* LCDC (readable for Qt driver) */
......
......@@ -1063,6 +1063,29 @@ int s3c2410_dma_devconfig(int channel,
EXPORT_SYMBOL(s3c2410_dma_devconfig);
/* s3c2410_dma_getposition
*
* returns the current transfer points for the dma source and destination
*/
int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst)
{
s3c2410_dma_chan_t *chan = &s3c2410_chans[channel];
check_channel(channel);
if (src != NULL)
*src = dma_rdreg(chan, S3C2410_DMA_DCSRC);
if (dst != NULL)
*dst = dma_rdreg(chan, S3C2410_DMA_DCDST);
return 0;
}
EXPORT_SYMBOL(s3c2410_dma_getposition);
/* system device class */
#ifdef CONFIG_PM
......
......@@ -20,8 +20,9 @@
* 18-Jan-2003 BJD Added serial port configuration
* 05-Oct-2004 BJD Power management code
* 04-Nov-2004 BJD Updated serial port clocks
* 04-Jan-2006 BJD New uart init call
* 04-Jan-2005 BJD New uart init call
* 10-Jan-2005 BJD Removed include of s3c2410.h
* 14-Jan-2005 BJD Add support for muitlple NAND devices
*/
#include <linux/kernel.h>
......@@ -48,6 +49,12 @@
#include <asm/arch/regs-serial.h>
#include <asm/arch/regs-gpio.h>
#include <asm/arch/regs-mem.h>
#include <asm/arch/nand.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
#include "clock.h"
#include "devs.h"
......@@ -55,7 +62,7 @@
#include "usb-simtec.h"
#include "pm.h"
#define COPYRIGHT ", (c) 2004 Simtec Electronics"
#define COPYRIGHT ", (c) 2004-2005 Simtec Electronics"
/* macros for virtual address mods for the io space entries */
#define VA_C5(item) ((item) + BAST_VAM_CS5)
......@@ -220,6 +227,100 @@ static struct platform_device bast_device_nor = {
.resource = bast_nor_resource,
};
/* NAND Flash on BAST board */
static int smartmedia_map[] = { 0 };
static int chip0_map[] = { 1 };
static int chip1_map[] = { 2 };
static int chip2_map[] = { 3 };
struct mtd_partition bast_default_nand_part[] = {
[0] = {
.name = "Boot Agent",
.size = SZ_16K,
.offset = 0
},
[1] = {
.name = "/boot",
.size = SZ_4M - SZ_16K,
.offset = SZ_16K,
},
[2] = {
.name = "user",
.offset = SZ_4M,
.size = MTDPART_SIZ_FULL,
}
};
/* the bast has 4 selectable slots for nand-flash, the three
* on-board chip areas, as well as the external SmartMedia
* slot.
*
* Note, there is no current hot-plug support for the SmartMedia
* socket.
*/
static struct s3c2410_nand_set bast_nand_sets[] = {
[0] = {
.name = "SmartMedia",
.nr_chips = 1,
.nr_map = smartmedia_map,
.nr_partitions = ARRAY_SIZE(bast_default_nand_part),
.partitions = bast_default_nand_part
},
[1] = {
.name = "chip0",
.nr_chips = 1,
.nr_map = chip0_map,
.nr_partitions = ARRAY_SIZE(bast_default_nand_part),
.partitions = bast_default_nand_part
},
[2] = {
.name = "chip1",
.nr_chips = 1,
.nr_map = chip1_map,
.nr_partitions = ARRAY_SIZE(bast_default_nand_part),
.partitions = bast_default_nand_part
},
[3] = {
.name = "chip2",
.nr_chips = 1,
.nr_map = chip2_map,
.nr_partitions = ARRAY_SIZE(bast_default_nand_part),
.partitions = bast_default_nand_part
}
};
static void bast_nand_select(struct s3c2410_nand_set *set, int slot)
{
unsigned int tmp;
slot = set->nr_map[slot] & 3;
pr_debug("bast_nand: selecting slot %d (set %p,%p)\n",
slot, set, set->nr_map);
tmp = __raw_readb(BAST_VA_CTRL2);
tmp &= BAST_CPLD_CTLR2_IDERST;
tmp |= slot;
tmp |= BAST_CPLD_CTRL2_WNAND;
pr_debug("bast_nand: ctrl2 now %02x\n", tmp);
__raw_writeb(tmp, BAST_VA_CTRL2);
}
static struct s3c2410_platform_nand bast_nand_info = {
.tacls = 80,
.twrph0 = 80,
.twrph1 = 80,
.nr_sets = ARRAY_SIZE(bast_nand_sets),
.sets = bast_nand_sets,
.select_chip = bast_nand_select,
};
/* Standard BAST devices */
static struct platform_device *bast_devices[] __initdata = {
......@@ -229,6 +330,7 @@ static struct platform_device *bast_devices[] __initdata = {
&s3c_device_i2c,
&s3c_device_iis,
&s3c_device_rtc,
&s3c_device_nand,
&bast_device_nor
};
......@@ -262,6 +364,8 @@ void __init bast_map_io(void)
s3c24xx_uclk.parent = &s3c24xx_clkout1;
s3c_device_nand.dev.platform_data = &bast_nand_info;
s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
s3c24xx_init_clocks(0);
s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
......
/* linux/arch/arm/mach-s3c2410/mach-vr1000.c
*
* Copyright (c) 2003,2004 Simtec Electronics
* Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Machine support for Thorcom VR1000 board. Designed for Thorcom by
......@@ -18,9 +18,11 @@
* 05-Apr-2004 BJD Copied to make mach-vr1000.c
* 18-Oct-2004 BJD Updated board struct
* 04-Nov-2004 BJD Clock and serial configuration update
*
* 04-Jan-2005 BJD Updated uart init call
* 10-Jan-2005 BJD Removed include of s3c2410.h
* 14-Jan-2005 BJD Added clock init
* 15-Jan-2005 BJD Add serial port device definition
*/
#include <linux/kernel.h>
......@@ -30,12 +32,19 @@
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/bast-map.h>
#include <asm/arch/vr1000-map.h>
#include <asm/arch/vr1000-irq.h>
#include <asm/arch/vr1000-cpld.h>
#include <asm/hardware.h>
#include <asm/io.h>
......@@ -69,6 +78,10 @@ static struct map_desc vr1000_iodesc[] __initdata = {
{ S3C2410_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ S3C2410_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
/* serial ports */
{ VR1000_VA_SERIAL, VR1000_PA_SERIAL, SZ_1M, MT_DEVICE },
/* we could possibly compress the next set down into a set of smaller tables
* pagetables, but that would mean using an L2 section, and it still means
* we cannot actually feed the same register to an LDR due to 16K spacing
......@@ -166,12 +179,87 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] = {
}
};
/* definitions for the vr1000 extra 16550 serial ports */
#define VR1000_BAUDBASE (3692307)
#define VR1000_SERIAL_MEMBASE(x) ((void __iomem *)VR1000_VA_SERIAL + 0x80 + ((x) << 5))
#define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
static struct plat_serial8250_port serial_platform_data[] = {
[0] = {
.membase = VR1000_SERIAL_MEMBASE(0),
.mapbase = VR1000_SERIAL_MAPBASE(0),
.irq = IRQ_VR1000_SERIAL + 0,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 0,
.uartclk = VR1000_BAUDBASE,
},
[1] = {
.membase = VR1000_SERIAL_MEMBASE(1),
.mapbase = VR1000_SERIAL_MAPBASE(1),
.irq = IRQ_VR1000_SERIAL + 1,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 0,
.uartclk = VR1000_BAUDBASE,
},
[2] = {
.membase = VR1000_SERIAL_MEMBASE(2),
.mapbase = VR1000_SERIAL_MAPBASE(2),
.irq = IRQ_VR1000_SERIAL + 2,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 0,
.uartclk = VR1000_BAUDBASE,
},
[3] = {
.membase = VR1000_SERIAL_MEMBASE(3),
.mapbase = VR1000_SERIAL_MAPBASE(3),
.irq = IRQ_VR1000_SERIAL + 3,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 0,
.uartclk = VR1000_BAUDBASE,
},
{ },
};
static struct platform_device serial_device = {
.name = "serial8250",
.id = 0,
.dev = {
.platform_data = serial_platform_data,
},
};
/* MTD NOR Flash */
static struct resource vr1000_nor_resource[] = {
[0] = {
.start = S3C2410_CS1 + 0x4000000,
.end = S3C2410_CS1 + 0x4000000 + SZ_16M - 1,
.flags = IORESOURCE_MEM,
}
};
static struct platform_device vr1000_nor = {
.name = "bast-nor",
.id = -1,
.num_resources = ARRAY_SIZE(vr1000_nor_resource),
.resource = vr1000_nor_resource,
};
static struct platform_device *vr1000_devices[] __initdata = {
&s3c_device_usb,
&s3c_device_lcd,
&s3c_device_wdt,
&s3c_device_i2c,
&s3c_device_iis,
&serial_device,
&vr1000_nor,
};
static struct clk *vr1000_clocks[] = {
......
......@@ -1210,6 +1210,7 @@
#define GPIO30_SDATA_OUT 30 /* AC97/I2S Sdata_out */
#define GPIO31_SYNC 31 /* AC97/I2S sync */
#define GPIO32_SDATA_IN1 32 /* AC97 Sdata_in1 */
#define GPIO32_SYSCLK 32 /* I2S System Clock */
#define GPIO32_MMCCLK 32 /* MMC Clock (PXA270) */
#define GPIO33_nCS_5 33 /* chip select 5 */
#define GPIO34_FFRXD 34 /* FFUART receive */
......@@ -1327,14 +1328,16 @@
#define GPIO26_SRXD_MD (26 | GPIO_ALT_FN_1_IN)
#define GPIO27_SEXTCLK_MD (27 | GPIO_ALT_FN_1_IN)
#define GPIO28_BITCLK_AC97_MD (28 | GPIO_ALT_FN_1_IN)
#define GPIO28_BITCLK_I2S_MD (28 | GPIO_ALT_FN_2_IN)
#define GPIO28_BITCLK_IN_I2S_MD (28 | GPIO_ALT_FN_2_IN)
#define GPIO28_BITCLK_OUT_I2S_MD (28 | GPIO_ALT_FN_1_OUT)
#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN)
#define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN)
#define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT)
#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT)
#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT)
#define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT)
#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT)
#define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN)
#define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT)
#define GPIO32_MMCCLK_MD ( 32 | GPIO_ALT_FN_2_OUT)
#define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT)
#define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN)
......
......@@ -285,6 +285,14 @@ extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon);
extern int s3c2410_dma_devconfig(int channel, s3c2410_dmasrc_t source,
int hwcfg, unsigned long devaddr);
/* s3c2410_dma_getposition
*
* get the position that the dma transfer is currently at
*/
extern int s3c2410_dma_getposition(dmach_t channel,
dma_addr_t *src, dma_addr_t *dest);
extern int s3c2410_dma_set_opfn(dmach_t, s3c2410_dma_opfn_t rtn);
extern int s3c2410_dma_set_buffdone_fn(dmach_t, s3c2410_dma_cbfn_t rtn);
......
......@@ -18,7 +18,7 @@
#ifndef __ASM_ARCH_REGS_IIS_H
#define __ASM_ARCH_REGS_IIS_H
#define S3C2410_IISCON (S3C2410_VA_IIS + 0x00)
#define S3C2410_IISCON (0x00)
#define S3C2410_IISCON_LRINDEX (1<<8)
#define S3C2410_IISCON_TXFIFORDY (1<<7)
......@@ -29,7 +29,7 @@
#define S3C2410_IISCON_RXIDLE (1<<2)
#define S3C2410_IISCON_IISEN (1<<0)
#define S3C2410_IISMOD (S3C2410_VA_IIS + 0x04)
#define S3C2410_IISMOD (0x04)
#define S3C2410_IISMOD_SLAVE (1<<8)
#define S3C2410_IISMOD_NOXFER (0<<6)
......@@ -48,16 +48,20 @@
#define S3C2410_IISMOD_32FS (1<<0)
#define S3C2410_IISMOD_48FS (2<<0)
#define S3C2410_IISPSR (S3C2410_VA_IIS + 0x08)
#define S3C2410_IISPSR (0x08)
#define S3C2410_IISPSR_INTMASK (31<<5)
#define S3C2410_IISPSR_INTSHFIT (5)
#define S3C2410_IISPSR_EXTMASK (31<<0)
#define S3C2410_IISPSR_EXTSHFIT (0)
#define S3C2410_IISFCON (S3C2410_VA_IIS + 0x0c)
#define S3C2410_IISFCON (0x0c)
#define S3C2410_IISFCON_TXDMA (1<<15)
#define S3C2410_IISFCON_RXDMA (1<<14)
#define S3C2410_IISFCON_TXENABLE (1<<13)
#define S3C2410_IISFCON_RXENABLE (1<<12)
#define S3C2410_IISFIFO (S3C2410_VA_IIS + 0x10)
#define S3C2410_IISFIFO (0x10)
#endif /* __ASM_ARCH_REGS_IIS_H */
/* linux/include/asm-arm/arch-s3c2410/vr1000-map.h
*
* (c) 2003,2004 Simtec Electronics
* (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Machine VR1000 - Memory map definitions
......@@ -13,6 +13,7 @@
* 06-Jan-2003 BJD Linux 2.6.0 version, split specifics from arch/map.h
* 12-Mar-2004 BJD Fixed header include protection
* 19-Mar-2004 BJD Copied to VR1000 machine headers.
* 19-Jan-2005 BJD Updated map definitions
*/
/* needs arch/map.h including with this */
......@@ -94,7 +95,6 @@
#define VR1000_VA_DM9000 (VR1000_VA_MULTISPACE + 0x02500000)
#define VR1000_VA_SUPERIO (VR1000_VA_MULTISPACE + 0x02600000)
/* physical offset addresses for the peripherals */
#define VR1000_PA_IDEPRI (0x02000000)
......@@ -104,6 +104,10 @@
#define VR1000_PA_DM9000 (0x05000000)
#define VR1000_PA_SERIAL (0x11800000)
#define VR1000_VA_SERIAL (VR1000_IOADDR(0x00700000))
/* VR1000 ram is in CS1, with A26..A24 = 2_101 */
#define VR1000_PA_SRAM (S3C2410_CS1 | 0x05000000)
/* some configurations for the peripherals */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment