Commit 72c97126 authored by Jean-Philippe Brucker's avatar Jean-Philippe Brucker Committed by Marc Zyngier

irqchip/gic-v3: Specialize readq and writeq accesses

On 32bit platforms, we cannot assure that an I/O ldrd or strd will be
done atomically. Besides, an hypervisor would be unable to emulate such
accesses.
In order to allow the AArch32 version of the driver to split them into
two 32bit accesses while keeping the requirement for atomic writes, this
patch specializes the IROUTER and TYPER accesses.
Since the latter is an ID register, it won't need to be read atomically,
but we still avoid future confusion by using gic_read_typer instead of a
generic gic_readq.
Reviewed-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarJean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent f6c86a41
...@@ -163,5 +163,8 @@ static inline void gic_write_sre(u32 val) ...@@ -163,5 +163,8 @@ static inline void gic_write_sre(u32 val)
isb(); isb();
} }
#define gic_read_typer(c) readq_relaxed(c)
#define gic_write_irouter(v, c) writeq_relaxed(v, c)
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_GICV3_H */ #endif /* __ASM_ARCH_GICV3_H */
...@@ -392,7 +392,7 @@ static void __init gic_dist_init(void) ...@@ -392,7 +392,7 @@ static void __init gic_dist_init(void)
*/ */
affinity = gic_mpidr_to_affinity(cpu_logical_map(smp_processor_id())); affinity = gic_mpidr_to_affinity(cpu_logical_map(smp_processor_id()));
for (i = 32; i < gic_data.irq_nr; i++) for (i = 32; i < gic_data.irq_nr; i++)
writeq_relaxed(affinity, base + GICD_IROUTER + i * 8); gic_write_irouter(affinity, base + GICD_IROUTER + i * 8);
} }
static int gic_populate_rdist(void) static int gic_populate_rdist(void)
...@@ -423,7 +423,7 @@ static int gic_populate_rdist(void) ...@@ -423,7 +423,7 @@ static int gic_populate_rdist(void)
} }
do { do {
typer = readq_relaxed(ptr + GICR_TYPER); typer = gic_read_typer(ptr + GICR_TYPER);
if ((typer >> 32) == aff) { if ((typer >> 32) == aff) {
u64 offset = ptr - gic_data.redist_regions[i].redist_base; u64 offset = ptr - gic_data.redist_regions[i].redist_base;
gic_data_rdist_rd_base() = ptr; gic_data_rdist_rd_base() = ptr;
...@@ -623,7 +623,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, ...@@ -623,7 +623,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
reg = gic_dist_base(d) + GICD_IROUTER + (gic_irq(d) * 8); reg = gic_dist_base(d) + GICD_IROUTER + (gic_irq(d) * 8);
val = gic_mpidr_to_affinity(cpu_logical_map(cpu)); val = gic_mpidr_to_affinity(cpu_logical_map(cpu));
writeq_relaxed(val, reg); gic_write_irouter(val, reg);
/* /*
* If the interrupt was enabled, enabled it again. Otherwise, * If the interrupt was enabled, enabled it again. Otherwise,
......
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