Commit 72eaa723 authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher

drm/amd/display: get dprefclk ss info from integration info table

[why & how]
we have two SSC_En:
we get ssc_info from dce_info for MPLL_SSC_EN.
we used to call VBIOS cmdtbl's smu_info's SS persentage for DPRECLK SS info,
is used for DP AUDIO and VBIOS' smu_info table was from systemIntegrationInfoTable.

since dcn35 VBIOS removed smu_info, driver need to use integrationInfotable directly.
Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: default avatarWayne Lin <wayne.lin@amd.com>
Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8b09656b
...@@ -1014,13 +1014,20 @@ static enum bp_result get_ss_info_v4_5( ...@@ -1014,13 +1014,20 @@ static enum bp_result get_ss_info_v4_5(
DC_LOG_BIOS("AS_SIGNAL_TYPE_HDMI ss_percentage: %d\n", ss_info->spread_spectrum_percentage); DC_LOG_BIOS("AS_SIGNAL_TYPE_HDMI ss_percentage: %d\n", ss_info->spread_spectrum_percentage);
break; break;
case AS_SIGNAL_TYPE_DISPLAY_PORT: case AS_SIGNAL_TYPE_DISPLAY_PORT:
ss_info->spread_spectrum_percentage = if (bp->base.integrated_info) {
DC_LOG_BIOS("gpuclk_ss_percentage (unit of 0.001 percent): %d\n", bp->base.integrated_info->gpuclk_ss_percentage);
ss_info->spread_spectrum_percentage =
bp->base.integrated_info->gpuclk_ss_percentage;
ss_info->type.CENTER_MODE =
bp->base.integrated_info->gpuclk_ss_type;
} else {
ss_info->spread_spectrum_percentage =
disp_cntl_tbl->dp_ss_percentage; disp_cntl_tbl->dp_ss_percentage;
ss_info->spread_spectrum_range = ss_info->spread_spectrum_range =
disp_cntl_tbl->dp_ss_rate_10hz * 10; disp_cntl_tbl->dp_ss_rate_10hz * 10;
if (disp_cntl_tbl->dp_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE) if (disp_cntl_tbl->dp_ss_mode & ATOM_SS_CENTRE_SPREAD_MODE)
ss_info->type.CENTER_MODE = true; ss_info->type.CENTER_MODE = true;
}
DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT ss_percentage: %d\n", ss_info->spread_spectrum_percentage); DC_LOG_BIOS("AS_SIGNAL_TYPE_DISPLAY_PORT ss_percentage: %d\n", ss_info->spread_spectrum_percentage);
break; break;
case AS_SIGNAL_TYPE_GPU_PLL: case AS_SIGNAL_TYPE_GPU_PLL:
...@@ -2813,6 +2820,8 @@ static enum bp_result get_integrated_info_v2_2( ...@@ -2813,6 +2820,8 @@ static enum bp_result get_integrated_info_v2_2(
info->ma_channel_number = info_v2_2->umachannelnumber; info->ma_channel_number = info_v2_2->umachannelnumber;
info->dp_ss_control = info->dp_ss_control =
le16_to_cpu(info_v2_2->reserved1); le16_to_cpu(info_v2_2->reserved1);
info->gpuclk_ss_percentage = info_v2_2->gpuclk_ss_percentage;
info->gpuclk_ss_type = info_v2_2->gpuclk_ss_type;
for (i = 0; i < NUMBER_OF_UCHAR_FOR_GUID; ++i) { for (i = 0; i < NUMBER_OF_UCHAR_FOR_GUID; ++i) {
info->ext_disp_conn_info.gu_id[i] = info->ext_disp_conn_info.gu_id[i] =
......
...@@ -417,6 +417,8 @@ struct integrated_info { ...@@ -417,6 +417,8 @@ struct integrated_info {
/* V2.1 */ /* V2.1 */
struct edp_info edp1_info; struct edp_info edp1_info;
struct edp_info edp2_info; struct edp_info edp2_info;
uint32_t gpuclk_ss_percentage;
uint32_t gpuclk_ss_type;
}; };
/* /*
......
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