Commit 732dbcf5 authored by Patrice Chotard's avatar Patrice Chotard Committed by Alexandre Torgue

ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp157c-emstamp-argon

Chip select pinctrl phandle was missing in several stm32mp15x based boards.

Fixes: ea99a5a0 ("ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi")
Signed-off-by: default avatarPatrice Chotard <patrice.chotard@foss.st.com>
Cc: Reinhold Mueller <reinhold.mueller@emtrion.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@foss.st.com>
parent 21d83512
...@@ -391,8 +391,12 @@ &pwr_regulators { ...@@ -391,8 +391,12 @@ &pwr_regulators {
&qspi { &qspi {
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>; pinctrl-0 = <&qspi_clk_pins_a
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>; &qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
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