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Commit 7356420c authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo
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ARM: imx: Remove mx508 support 

Only mx508 based board is mach-mx50_rdp and it has been marked as BROKEN
for several releases.

mx508 currently lacks clock support.

In case someone needs to add mx508 support back, then the recommended approach
is to use device tree.
Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent d0ab36c9
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Showing with 9 additions and 1703 deletions
arch/arm/Kconfig.debug
View file @ 7356420c
......@@ -219,12 +219,12 @@ choice
Say Y here if you want kernel low-level debugging support
on i.MX51.
config DEBUG_IMX50_IMX53_UART
bool "i.MX50 and i.MX53 Debug UART"
depends on SOC_IMX50 || SOC_IMX53
config DEBUG_IMX53_UART
bool "i.MX53 Debug UART"
depends on SOC_IMX53
help
Say Y here if you want kernel low-level debugging support
on i.MX50 or i.MX53.
on i.MX53.
config DEBUG_IMX6Q_UART
bool "i.MX6Q Debug UART"
......@@ -497,7 +497,7 @@ config DEBUG_LL_INCLUDE
DEBUG_IMX21_IMX27_UART || \
DEBUG_IMX31_IMX35_UART || \
DEBUG_IMX51_UART || \
DEBUG_IMX50_IMX53_UART ||\
DEBUG_IMX53_UART ||\
DEBUG_IMX6Q_UART
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART
......
arch/arm/include/debug/imx.S
View file @ 7356420c
......@@ -34,7 +34,7 @@
#define UART_PADDR 0x43f90000
#elif defined (CONFIG_DEBUG_IMX51_UART)
#define UART_PADDR 0x73fbc000
#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
#elif defined (CONFIG_DEBUG_IMX53_UART)
#define UART_PADDR 0x53fbc000
#elif defined (CONFIG_DEBUG_IMX6Q_UART)
#define UART_PADDR IMX6Q_DEBUG_UART_BASE
......
arch/arm/mach-imx/Kconfig
View file @ 7356420c
......@@ -95,9 +95,6 @@ config MACH_MX27
config ARCH_MX5
bool
config ARCH_MX50
bool
config ARCH_MX51
bool
......@@ -164,11 +161,6 @@ config SOC_IMX5
select CPU_V7
select MXC_TZIC
config SOC_IMX50
bool
select ARCH_MX50
select SOC_IMX5
config SOC_IMX51
bool
select ARCH_MX5
......@@ -738,20 +730,6 @@ endif
if ARCH_MULTI_V7
comment "i.MX5 platforms:"
config MACH_MX50_RDP
bool "Support MX50 reference design platform"
depends on BROKEN
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select IMX_HAVE_PLATFORM_SPI_IMX
select SOC_IMX50
help
Include support for MX50 reference design platform (RDP) board. This
includes specific configurations for the board and its peripherals.
comment "i.MX51 machines:"
config MACH_IMX51_DT
......
arch/arm/mach-imx/Makefile
View file @ 7356420c
......@@ -104,7 +104,6 @@ endif
obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o
obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o
obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
......
arch/arm/mach-imx/Makefile.boot
View file @ 7356420c
......@@ -22,10 +22,6 @@ zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000
params_phys-$(CONFIG_SOC_IMX35) := 0x80000100
initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
zreladdr-$(CONFIG_SOC_IMX50) += 0x70008000
params_phys-$(CONFIG_SOC_IMX50) := 0x70000100
initrd_phys-$(CONFIG_SOC_IMX50) := 0x70800000
zreladdr-$(CONFIG_SOC_IMX51) += 0x90008000
params_phys-$(CONFIG_SOC_IMX51) := 0x90000100
initrd_phys-$(CONFIG_SOC_IMX51) := 0x90800000
......
arch/arm/mach-imx/common.h
View file @ 7356420c
......@@ -21,7 +21,6 @@ extern void mx25_map_io(void);
extern void mx27_map_io(void);
extern void mx31_map_io(void);
extern void mx35_map_io(void);
extern void mx50_map_io(void);
extern void mx51_map_io(void);
extern void mx53_map_io(void);
extern void imx1_init_early(void);
......@@ -30,7 +29,6 @@ extern void imx25_init_early(void);
extern void imx27_init_early(void);
extern void imx31_init_early(void);
extern void imx35_init_early(void);
extern void imx50_init_early(void);
extern void imx51_init_early(void);
extern void imx53_init_early(void);
extern void mxc_init_irq(void __iomem *);
......@@ -41,7 +39,6 @@ extern void mx25_init_irq(void);
extern void mx27_init_irq(void);
extern void mx31_init_irq(void);
extern void mx35_init_irq(void);
extern void mx50_init_irq(void);
extern void mx51_init_irq(void);
extern void mx53_init_irq(void);
extern void imx1_soc_init(void);
......@@ -50,7 +47,6 @@ extern void imx25_soc_init(void);
extern void imx27_soc_init(void);
extern void imx31_soc_init(void);
extern void imx35_soc_init(void);
extern void imx50_soc_init(void);
extern void imx51_soc_init(void);
extern void imx51_init_late(void);
extern void imx53_init_late(void);
......@@ -109,7 +105,6 @@ void tzic_handle_irq(struct pt_regs *);
#define imx27_handle_irq avic_handle_irq
#define imx31_handle_irq avic_handle_irq
#define imx35_handle_irq avic_handle_irq
#define imx50_handle_irq tzic_handle_irq
#define imx51_handle_irq tzic_handle_irq
#define imx53_handle_irq tzic_handle_irq
#define imx6q_handle_irq gic_handle_irq
......
arch/arm/mach-imx/cpu-imx5.c
View file @ 7356420c
......@@ -22,7 +22,6 @@
static int mx5_cpu_rev = -1;
#define IIM_SREV 0x24
#define MX50_HW_ADADIG_DIGPROG 0xB0
static int get_mx51_srev(void)
{
......@@ -108,41 +107,3 @@ int mx53_revision(void)
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx53_revision);
static int get_mx50_srev(void)
{
void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K);
u32 rev;
if (!anatop) {
mx5_cpu_rev = -EINVAL;
return 0;
}
rev = readl(anatop + MX50_HW_ADADIG_DIGPROG);
rev &= 0xff;
iounmap(anatop);
if (rev == 0x0)
return IMX_CHIP_REVISION_1_0;
else if (rev == 0x1)
return IMX_CHIP_REVISION_1_1;
return 0;
}
/*
* Returns:
* the silicon revision of the cpu
* -EINVAL - not a mx50
*/
int mx50_revision(void)
{
if (!cpu_is_mx50())
return -EINVAL;
if (mx5_cpu_rev == -1)
mx5_cpu_rev = get_mx50_srev();
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx50_revision);
arch/arm/mach-imx/devices-imx50.h deleted 100644 → 0
View file @ d0ab36c9
/*
* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#include "devices/devices-common.h"
extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[];
#define imx50_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx50_imx_uart_data[id], pdata)
extern const struct imx_fec_data imx50_fec_data;
#define imx50_add_fec(pdata) \
imx_add_fec(&imx50_fec_data, pdata)
extern const struct imx_imx_i2c_data imx50_imx_i2c_data[];
#define imx50_add_imx_i2c(id, pdata) \
imx_add_imx_i2c(&imx50_imx_i2c_data[id], pdata)
arch/arm/mach-imx/devices/Kconfig
View file @ 7356420c
config IMX_HAVE_PLATFORM_FEC
bool
default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX50 || SOC_IMX51 || SOC_IMX53
default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX51 || SOC_IMX53
config IMX_HAVE_PLATFORM_FLEXCAN
bool
......
arch/arm/mach-imx/devices/platform-fec.c
View file @ 7356420c
......@@ -35,12 +35,6 @@ const struct imx_fec_data imx35_fec_data __initconst =
imx_fec_data_entry_single(MX35, "imx27-fec");
#endif
#ifdef CONFIG_SOC_IMX50
/* i.mx50 has the i.mx25 type fec */
const struct imx_fec_data imx50_fec_data __initconst =
imx_fec_data_entry_single(MX50, "imx25-fec");
#endif
#ifdef CONFIG_SOC_IMX51
/* i.mx51 has the i.mx27 type fec */
const struct imx_fec_data imx51_fec_data __initconst =
......
arch/arm/mach-imx/devices/platform-imx-i2c.c
View file @ 7356420c
......@@ -70,16 +70,6 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
};
#endif /* ifdef CONFIG_SOC_IMX35 */
#ifdef CONFIG_SOC_IMX50
const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
#define imx50_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K)
imx50_imx_i2c_data_entry(0, 1),
imx50_imx_i2c_data_entry(1, 2),
imx50_imx_i2c_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX51 */
#ifdef CONFIG_SOC_IMX51
const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
#define imx51_imx_i2c_data_entry(_id, _hwid) \
......
arch/arm/mach-imx/devices/platform-imx-uart.c
View file @ 7356420c
......@@ -94,18 +94,6 @@ const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = {
};
#endif /* ifdef CONFIG_SOC_IMX35 */
#ifdef CONFIG_SOC_IMX50
const struct imx_imx_uart_1irq_data imx50_imx_uart_data[] __initconst = {
#define imx50_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX50, _id, _hwid, SZ_4K)
imx50_imx_uart_data_entry(0, 1),
imx50_imx_uart_data_entry(1, 2),
imx50_imx_uart_data_entry(2, 3),
imx50_imx_uart_data_entry(3, 4),
imx50_imx_uart_data_entry(4, 5),
};
#endif /* ifdef CONFIG_SOC_IMX50 */
#ifdef CONFIG_SOC_IMX51
const struct imx_imx_uart_1irq_data imx51_imx_uart_data[] __initconst = {
#define imx51_imx_uart_data_entry(_id, _hwid) \
......
arch/arm/mach-imx/hardware.h
View file @ 7356420c
......@@ -72,11 +72,6 @@
* AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
* X_MEMC 0xb8000000+0x010000 -> 0xf5c00000+0x010000
* SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
* mx50:
* TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000
* AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000
* SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
* AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000
* mx51:
* TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000
* IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000
......@@ -108,7 +103,6 @@
#include "mxc.h"
#include "mx6q.h"
#include "mx50.h"
#include "mx51.h"
#include "mx53.h"
#include "mx3x.h"
......
arch/arm/mach-imx/iomux-mx50.h deleted 100644 → 0
View file @ d0ab36c9
This diff is collapsed.
arch/arm/mach-imx/mach-mx50_rdp.c deleted 100644 → 0
View file @ d0ab36c9
/*
* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include "common.h"
#include "devices-imx50.h"
#include "hardware.h"
#include "iomux-mx50.h"
#define FEC_EN IMX_GPIO_NR(6, 23)
#define FEC_RESET_B IMX_GPIO_NR(4, 12)
static iomux_v3_cfg_t mx50_rdp_pads[] __initdata = {
/* SD1 */
MX50_PAD_ECSPI2_SS0__GPIO_4_19,
MX50_PAD_EIM_CRE__GPIO_1_27,
MX50_PAD_SD1_CMD__SD1_CMD,
MX50_PAD_SD1_CLK__SD1_CLK,
MX50_PAD_SD1_D0__SD1_D0,
MX50_PAD_SD1_D1__SD1_D1,
MX50_PAD_SD1_D2__SD1_D2,
MX50_PAD_SD1_D3__SD1_D3,
/* SD2 */
MX50_PAD_SD2_CD__GPIO_5_17,
MX50_PAD_SD2_WP__GPIO_5_16,
MX50_PAD_SD2_CMD__SD2_CMD,
MX50_PAD_SD2_CLK__SD2_CLK,
MX50_PAD_SD2_D0__SD2_D0,
MX50_PAD_SD2_D1__SD2_D1,
MX50_PAD_SD2_D2__SD2_D2,
MX50_PAD_SD2_D3__SD2_D3,
MX50_PAD_SD2_D4__SD2_D4,
MX50_PAD_SD2_D5__SD2_D5,
MX50_PAD_SD2_D6__SD2_D6,
MX50_PAD_SD2_D7__SD2_D7,
/* SD3 */
MX50_PAD_SD3_CMD__SD3_CMD,
MX50_PAD_SD3_CLK__SD3_CLK,
MX50_PAD_SD3_D0__SD3_D0,
MX50_PAD_SD3_D1__SD3_D1,
MX50_PAD_SD3_D2__SD3_D2,
MX50_PAD_SD3_D3__SD3_D3,
MX50_PAD_SD3_D4__SD3_D4,
MX50_PAD_SD3_D5__SD3_D5,
MX50_PAD_SD3_D6__SD3_D6,
MX50_PAD_SD3_D7__SD3_D7,
/* PWR_INT */
MX50_PAD_ECSPI2_MISO__GPIO_4_18,
/* UART pad setting */
MX50_PAD_UART1_TXD__UART1_TXD,
MX50_PAD_UART1_RXD__UART1_RXD,
MX50_PAD_UART1_RTS__UART1_RTS,
MX50_PAD_UART2_TXD__UART2_TXD,
MX50_PAD_UART2_RXD__UART2_RXD,
MX50_PAD_UART2_CTS__UART2_CTS,
MX50_PAD_UART2_RTS__UART2_RTS,
MX50_PAD_I2C1_SCL__I2C1_SCL,
MX50_PAD_I2C1_SDA__I2C1_SDA,
MX50_PAD_I2C2_SCL__I2C2_SCL,
MX50_PAD_I2C2_SDA__I2C2_SDA,
MX50_PAD_EPITO__USBH1_PWR,
/* Need to comment below line if
* one needs to debug owire.
*/
MX50_PAD_OWIRE__USBH1_OC,
/* using gpio to control otg pwr */
MX50_PAD_PWM2__GPIO_6_25,
MX50_PAD_I2C3_SCL__USBOTG_OC,
MX50_PAD_SSI_RXC__FEC_MDIO,
MX50_PAD_SSI_RXFS__FEC_MDC,
MX50_PAD_DISP_D0__FEC_TXCLK,
MX50_PAD_DISP_D1__FEC_RX_ER,
MX50_PAD_DISP_D2__FEC_RX_DV,
MX50_PAD_DISP_D3__FEC_RXD1,
MX50_PAD_DISP_D4__FEC_RXD0,
MX50_PAD_DISP_D5__FEC_TX_EN,
MX50_PAD_DISP_D6__FEC_TXD1,
MX50_PAD_DISP_D7__FEC_TXD0,
MX50_PAD_I2C3_SDA__GPIO_6_23,
MX50_PAD_ECSPI1_SCLK__GPIO_4_12,
MX50_PAD_CSPI_SS0__CSPI_SS0,
MX50_PAD_ECSPI1_MOSI__CSPI_SS1,
MX50_PAD_CSPI_MOSI__CSPI_MOSI,
MX50_PAD_CSPI_MISO__CSPI_MISO,
/* SGTL500_OSC_EN */
MX50_PAD_UART1_CTS__GPIO_6_8,
/* SGTL_AMP_SHDN */
MX50_PAD_UART3_RXD__GPIO_6_15,
/* Keypad */
MX50_PAD_KEY_COL0__KEY_COL0,
MX50_PAD_KEY_ROW0__KEY_ROW0,
MX50_PAD_KEY_COL1__KEY_COL1,
MX50_PAD_KEY_ROW1__KEY_ROW1,
MX50_PAD_KEY_COL2__KEY_COL2,
MX50_PAD_KEY_ROW2__KEY_ROW2,
MX50_PAD_KEY_COL3__KEY_COL3,
MX50_PAD_KEY_ROW3__KEY_ROW3,
MX50_PAD_EIM_DA0__KEY_COL4,
MX50_PAD_EIM_DA1__KEY_ROW4,
MX50_PAD_EIM_DA2__KEY_COL5,
MX50_PAD_EIM_DA3__KEY_ROW5,
MX50_PAD_EIM_DA4__KEY_COL6,
MX50_PAD_EIM_DA5__KEY_ROW6,
MX50_PAD_EIM_DA6__KEY_COL7,
MX50_PAD_EIM_DA7__KEY_ROW7,
/*EIM pads */
MX50_PAD_EIM_DA8__GPIO_1_8,
MX50_PAD_EIM_DA9__GPIO_1_9,
MX50_PAD_EIM_DA10__GPIO_1_10,
MX50_PAD_EIM_DA11__GPIO_1_11,
MX50_PAD_EIM_DA12__GPIO_1_12,
MX50_PAD_EIM_DA13__GPIO_1_13,
MX50_PAD_EIM_DA14__GPIO_1_14,
MX50_PAD_EIM_DA15__GPIO_1_15,
MX50_PAD_EIM_CS2__GPIO_1_16,
MX50_PAD_EIM_CS1__GPIO_1_17,
MX50_PAD_EIM_CS0__GPIO_1_18,
MX50_PAD_EIM_EB0__GPIO_1_19,
MX50_PAD_EIM_EB1__GPIO_1_20,
MX50_PAD_EIM_WAIT__GPIO_1_21,
MX50_PAD_EIM_BCLK__GPIO_1_22,
MX50_PAD_EIM_RDY__GPIO_1_23,
MX50_PAD_EIM_OE__GPIO_1_24,
};
/* Serial ports */
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static const struct fec_platform_data fec_data __initconst = {
.phy = PHY_INTERFACE_MODE_RMII,
};
static inline void mx50_rdp_fec_reset(void)
{
gpio_request(FEC_EN, "fec-en");
gpio_direction_output(FEC_EN, 0);
gpio_request(FEC_RESET_B, "fec-reset_b");
gpio_direction_output(FEC_RESET_B, 0);
msleep(1);
gpio_set_value(FEC_RESET_B, 1);
}
static const struct imxi2c_platform_data i2c_data __initconst = {
.bitrate = 100000,
};
/*
* Board specific initialization.
*/
static void __init mx50_rdp_board_init(void)
{
imx50_soc_init();
mxc_iomux_v3_setup_multiple_pads(mx50_rdp_pads,
ARRAY_SIZE(mx50_rdp_pads));
imx50_add_imx_uart(0, &uart_pdata);
imx50_add_imx_uart(1, &uart_pdata);
mx50_rdp_fec_reset();
imx50_add_fec(&fec_data);
imx50_add_imx_i2c(0, &i2c_data);
imx50_add_imx_i2c(1, &i2c_data);
imx50_add_imx_i2c(2, &i2c_data);
}
static void __init mx50_rdp_timer_init(void)
{
mx50_clocks_init(32768, 24000000, 22579200);
}
static struct sys_timer mx50_rdp_timer = {
.init = mx50_rdp_timer_init,
};
MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
.map_io = mx50_map_io,
.init_early = imx50_init_early,
.init_irq = mx50_init_irq,
.handle_irq = imx50_handle_irq,
.timer = &mx50_rdp_timer,
.init_machine = mx50_rdp_board_init,
.restart = mxc_restart,
MACHINE_END
arch/arm/mach-imx/mm-imx5.c
View file @ 7356420c
......@@ -23,16 +23,6 @@
#include "hardware.h"
#include "iomux-v3.h"
/*
* Define the MX50 memory map.
*/
static struct map_desc mx50_io_desc[] __initdata = {
imx_map_entry(MX50, TZIC, MT_DEVICE),
imx_map_entry(MX50, SPBA0, MT_DEVICE),
imx_map_entry(MX50, AIPS1, MT_DEVICE),
imx_map_entry(MX50, AIPS2, MT_DEVICE),
};
/*
* Define the MX51 memory map.
*/
......@@ -59,11 +49,6 @@ static struct map_desc mx53_io_desc[] __initdata = {
* system startup to create static physical to virtual memory mappings
* for the IO modules.
*/
void __init mx50_map_io(void)
{
iotable_init(mx50_io_desc, ARRAY_SIZE(mx50_io_desc));
}
void __init mx51_map_io(void)
{
iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
......@@ -74,13 +59,6 @@ void __init mx53_map_io(void)
iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
}
void __init imx50_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX50);
mxc_iomux_v3_init(MX50_IO_ADDRESS(MX50_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
}
/*
* The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
* the Freescale marketing division. However this did not remove the
......@@ -115,11 +93,6 @@ void __init imx53_init_early(void)
mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
}
void __init mx50_init_irq(void)
{
tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
}
void __init mx51_init_irq(void)
{
tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
......@@ -148,31 +121,10 @@ static struct sdma_platform_data imx51_sdma_pdata __initdata = {
.script_addrs = &imx51_sdma_script,
};
static const struct resource imx50_audmux_res[] __initconst = {
DEFINE_RES_MEM(MX50_AUDMUX_BASE_ADDR, SZ_16K),
};
static const struct resource imx51_audmux_res[] __initconst = {
DEFINE_RES_MEM(MX51_AUDMUX_BASE_ADDR, SZ_16K),
};
void __init imx50_soc_init(void)
{
mxc_device_init();
/* i.mx50 has the i.mx35 type gpio */
mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
mxc_register_gpio("imx35-gpio", 2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
mxc_register_gpio("imx35-gpio", 3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
mxc_register_gpio("imx35-gpio", 4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
mxc_register_gpio("imx35-gpio", 5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
/* i.mx50 has the i.mx31 type audmux */
platform_device_register_simple("imx31-audmux", 0, imx50_audmux_res,
ARRAY_SIZE(imx50_audmux_res));
}
void __init imx51_soc_init(void)
{
mxc_device_init();
......
arch/arm/mach-imx/mx50.h deleted 100644 → 0
View file @ d0ab36c9
This diff is collapsed.
arch/arm/mach-imx/mxc.h
View file @ 7356420c
......@@ -32,7 +32,6 @@
#define MXC_CPU_MX27 27
#define MXC_CPU_MX31 31
#define MXC_CPU_MX35 35
#define MXC_CPU_MX50 50
#define MXC_CPU_MX51 51
#define MXC_CPU_MX53 53
......@@ -126,18 +125,6 @@ extern unsigned int __mxc_cpu_type;
# define cpu_is_mx35() (0)
#endif
#ifdef CONFIG_SOC_IMX50
# ifdef mxc_cpu_type
# undef mxc_cpu_type
# define mxc_cpu_type __mxc_cpu_type
# else
# define mxc_cpu_type MXC_CPU_MX50
# endif
# define cpu_is_mx50() (mxc_cpu_type == MXC_CPU_MX50)
#else
# define cpu_is_mx50() (0)
#endif
#ifdef CONFIG_SOC_IMX51
# ifdef mxc_cpu_type
# undef mxc_cpu_type
......
arch/arm/mach-imx/pm-imx5.c
View file @ 7356420c
......@@ -34,7 +34,7 @@
/*
* set cpu low power mode before WFI instruction. This function is called
* mx5 because it can be used for mx50, mx51, and mx53.
* mx5 because it can be used for mx51, and mx53.
*/
static void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
{
......@@ -85,10 +85,7 @@ static void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
__raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC);
__raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
__raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
/* Enable NEON SRPG for all but MX50TO1.0. */
if (mx50_revision() != IMX_CHIP_REVISION_1_0)
__raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
__raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
if (stop_mode) {
empgc0 |= MXC_SRPGCR_PCR;
......
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