Commit 735a58f4 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Linus Torvalds

[PATCH] radeonfb: typos fixes

The dynamic clock code in radeonfb comes almost as-is from X.org (where
it was contributed by ATI). It has a few typos (wrong register access
macros) that this patch fixes.
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent e2a980dd
...@@ -180,7 +180,7 @@ void radeon_pm_disable_dynamic_mode(struct radeonfb_info *rinfo) ...@@ -180,7 +180,7 @@ void radeon_pm_disable_dynamic_mode(struct radeonfb_info *rinfo)
tmp = INPLL(pllMCLK_CNTL); tmp = INPLL(pllMCLK_CNTL);
tmp &= ~(MCLK_CNTL__FORCE_MCLKA | tmp &= ~(MCLK_CNTL__FORCE_MCLKA |
MCLK_CNTL__FORCE_YCLKA); MCLK_CNTL__FORCE_YCLKA);
OUTREG(pllMCLK_CNTL, tmp); OUTPLL(pllMCLK_CNTL, tmp);
radeon_msleep(16); radeon_msleep(16);
} }
/* Hrm... same shit, X doesn't do that but I have to */ /* Hrm... same shit, X doesn't do that but I have to */
...@@ -404,7 +404,7 @@ void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo) ...@@ -404,7 +404,7 @@ void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo)
((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) { ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) {
tmp = INPLL(pllPLL_PWRMGT_CNTL); tmp = INPLL(pllPLL_PWRMGT_CNTL);
tmp |= PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE; tmp |= PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE;
OUTREG(pllPLL_PWRMGT_CNTL, tmp); OUTPLL(pllPLL_PWRMGT_CNTL, tmp);
radeon_msleep(15); radeon_msleep(15);
} }
......
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