Commit 738f66d3 authored by Michael Turquette's avatar Michael Turquette

clk: gxbb: add AmLogic GXBB clk controller driver

The gxbb clock controller is the primary clock generation unit for the
AmLogic GXBB SoC. It is clocked by a fixed 24MHz xtal, contains several
PLLs and the usual post-dividers, muxes, dividers and leaf gates that
are fed into various IP blocks in the SoC.
Tested-by: default avatarKevin Hilman <khilman@baylibre.com>
Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
parent 2cc9e7ec
...@@ -10,3 +10,10 @@ config COMMON_CLK_MESON8B ...@@ -10,3 +10,10 @@ config COMMON_CLK_MESON8B
Support for the clock controller on AmLogic S805 devices, aka Support for the clock controller on AmLogic S805 devices, aka
meson8b. Say Y if you want peripherals and CPU frequency scaling to meson8b. Say Y if you want peripherals and CPU frequency scaling to
work. work.
config COMMON_CLK_GXBB
bool
depends on COMMON_CLK_AMLOGIC
help
Support for the clock controller on AmLogic S905 devices, aka gxbb.
Say Y if you want peripherals and CPU frequency scaling to work.
...@@ -4,3 +4,4 @@ ...@@ -4,3 +4,4 @@
obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o
obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b-clkc.o obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b-clkc.o
obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o
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/*
* GXBB clock tree IDs
*/
#ifndef __GXBB_CLKC_H
#define __GXBB_CLKC_H
#define CLKID_CPUCLK 1
#define CLKID_CLK81 12
#define CLKID_ETH 36
#endif /* __GXBB_CLKC_H */
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