Commit 73bf3c2a authored by Alexander Sverdlin's avatar Alexander Sverdlin Committed by Ralf Baechle

MIPS: Octeon: Remove udelay() causing huge IRQ latency

udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
platforms because these operations are called from PCI_OP_READ() and
PCI_OP_WRITE() under raw_spin_lock_irqsave().
Signed-off-by: default avatarAlexander Sverdlin <alexander.sverdlin@nokia.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <ddaney@cavium.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Masanari Iida <standby24x7@gmail.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Mathias <mathias.rulf@nokia.com>
Patchwork: https://patchwork.linux-mips.org/patch/9576/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 4d46a67a
......@@ -11,9 +11,6 @@
#include <linux/pci.h>
/* Some PCI cards require delays when accessing config space. */
#define PCI_CONFIG_SPACE_DELAY 10000
/*
* The physical memory base mapped by BAR1. 256MB at the end of the
* first 4GB.
......
......@@ -271,9 +271,6 @@ static int octeon_read_config(struct pci_bus *bus, unsigned int devfn,
pci_addr.s.func = devfn & 0x7;
pci_addr.s.reg = reg;
#if PCI_CONFIG_SPACE_DELAY
udelay(PCI_CONFIG_SPACE_DELAY);
#endif
switch (size) {
case 4:
*val = le32_to_cpu(cvmx_read64_uint32(pci_addr.u64));
......@@ -308,9 +305,6 @@ static int octeon_write_config(struct pci_bus *bus, unsigned int devfn,
pci_addr.s.func = devfn & 0x7;
pci_addr.s.reg = reg;
#if PCI_CONFIG_SPACE_DELAY
udelay(PCI_CONFIG_SPACE_DELAY);
#endif
switch (size) {
case 4:
cvmx_write64_uint32(pci_addr.u64, cpu_to_le32(val));
......
......@@ -1762,14 +1762,6 @@ static int octeon_pcie_write_config(unsigned int pcie_port, struct pci_bus *bus,
default:
return PCIBIOS_FUNC_NOT_SUPPORTED;
}
#if PCI_CONFIG_SPACE_DELAY
/*
* Delay on writes so that devices have time to come up. Some
* bridges need this to allow time for the secondary busses to
* work
*/
udelay(PCI_CONFIG_SPACE_DELAY);
#endif
return PCIBIOS_SUCCESSFUL;
}
......
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