Commit 75196330 authored by Leo Yan's avatar Leo Yan Committed by Wei Xu

arm64: dts: hi3660: add sp804 timer node

The Hi3660 SoC comes with the sp804 timer in addition to the
architecture timers. These ones are shutdown when reaching a deep idle
states and a backup timer is needed. The sp804 belongs to another power
domain and can fulfill the purpose of replacing temporarily an
architecture timer when the CPU is idle.

Describe it in the device tree, so it can be enabled at boot time.
Suggested-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent 38810497
...@@ -186,6 +186,17 @@ iomcu_rst: reset { ...@@ -186,6 +186,17 @@ iomcu_rst: reset {
#reset-cells = <2>; #reset-cells = <2>;
}; };
dual_timer0: timer@fff14000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x0 0xfff14000 0x0 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>,
<&crg_ctrl HI3660_OSC32K>,
<&crg_ctrl HI3660_OSC32K>;
clock-names = "timer1", "timer2", "apb_pclk";
};
i2c0: i2c@ffd71000 { i2c0: i2c@ffd71000 {
compatible = "snps,designware-i2c"; compatible = "snps,designware-i2c";
reg = <0x0 0xffd71000 0x0 0x1000>; reg = <0x0 0xffd71000 0x0 0x1000>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment