Commit 75faef78 authored by Ben Skeggs's avatar Ben Skeggs

drm/nv50-nvaf/fb: split fbram oclass in preparation for reclocking

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 20cdeaf9
......@@ -93,6 +93,8 @@ nouveau-y += core/subdev/fb/ramnv44.o
nouveau-y += core/subdev/fb/ramnv49.o
nouveau-y += core/subdev/fb/ramnv4e.o
nouveau-y += core/subdev/fb/ramnv50.o
nouveau-y += core/subdev/fb/ramnva3.o
nouveau-y += core/subdev/fb/ramnvaa.o
nouveau-y += core/subdev/fb/ramnvc0.o
nouveau-y += core/subdev/gpio/base.o
nouveau-y += core/subdev/gpio/nv10.o
......
......@@ -20,6 +20,13 @@ struct nv50_fb_impl {
u32 trap;
};
#define nv50_ram_create(p,e,o,d) \
nv50_ram_create_((p), (e), (o), sizeof(**d), (void **)d)
int nv50_ram_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, int, void **);
int nv50_ram_get(struct nouveau_fb *, u64 size, u32 align, u32 ncmin,
u32 memtype, struct nouveau_mem **);
void nv50_ram_put(struct nouveau_fb *, struct nouveau_mem **);
void __nv50_ram_put(struct nouveau_fb *, struct nouveau_mem *);
extern int nv50_fb_memtype[0x80];
......
......@@ -34,6 +34,6 @@ nva3_fb_oclass = &(struct nv50_fb_impl) {
.fini = _nouveau_fb_fini,
},
.base.memtype = nv50_fb_memtype_valid,
.base.ram = &nv50_ram_oclass,
.base.ram = &nva3_ram_oclass,
.trap = 0x000d0fff,
}.base.base;
......@@ -34,6 +34,6 @@ nvaa_fb_oclass = &(struct nv50_fb_impl) {
.fini = _nouveau_fb_fini,
},
.base.memtype = nv50_fb_memtype_valid,
.base.ram = &nv50_ram_oclass,
.base.ram = &nvaa_ram_oclass,
.trap = 0x001d07ff,
}.base.base;
......@@ -34,6 +34,6 @@ nvaf_fb_oclass = &(struct nv50_fb_impl) {
.fini = _nouveau_fb_fini,
},
.base.memtype = nv50_fb_memtype_valid,
.base.ram = &nv50_ram_oclass,
.base.ram = &nvaa_ram_oclass,
.trap = 0x089d1fff,
}.base.base;
......@@ -12,6 +12,8 @@
#define nouveau_ram_fini(p,s) \
nouveau_object_fini(&(p)->base, (s))
#define nouveau_ram_create_(p,e,o,s,d) \
nouveau_object_create_((p), (e), (o), 0, (s), (void **)d)
#define _nouveau_ram_dtor nouveau_object_destroy
#define _nouveau_ram_init nouveau_object_init
#define _nouveau_ram_fini nouveau_object_fini
......
......@@ -27,6 +27,10 @@
#include "nv50.h"
struct nv50_ram {
struct nouveau_ram base;
};
void
__nv50_ram_put(struct nouveau_fb *pfb, struct nouveau_mem *mem)
{
......@@ -58,7 +62,7 @@ nv50_ram_put(struct nouveau_fb *pfb, struct nouveau_mem **pmem)
kfree(mem);
}
static int
int
nv50_ram_get(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin,
u32 memtype, struct nouveau_mem **pmem)
{
......@@ -161,77 +165,73 @@ nv50_fb_vram_rblock(struct nouveau_fb *pfb, struct nouveau_ram *ram)
return rblock_size;
}
static int
nv50_ram_create(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 datasize,
struct nouveau_object **pobject)
int
nv50_ram_create_(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, int length, void **pobject)
{
struct nouveau_fb *pfb = nouveau_fb(parent);
struct nouveau_device *device = nv_device(pfb);
struct nouveau_bios *bios = nouveau_bios(device);
struct nouveau_ram *ram;
const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */
const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */
u32 size;
struct nouveau_bios *bios = nouveau_bios(parent);
struct nouveau_fb *pfb = nouveau_fb(parent);
struct nouveau_ram *ram;
int ret;
ret = nouveau_ram_create(parent, engine, oclass, &ram);
*pobject = nv_object(ram);
ret = nouveau_ram_create_(parent, engine, oclass, length, pobject);
ram = *pobject;
if (ret)
return ret;
ram->size = nv_rd32(pfb, 0x10020c);
ram->size = (ram->size & 0xffffff00) |
((ram->size & 0x000000ff) << 32);
size = (ram->size >> 12) - rsvd_head - rsvd_tail;
switch (device->chipset) {
case 0xaa:
case 0xac:
case 0xaf: /* IGPs, no reordering, no real VRAM */
ret = nouveau_mm_init(&pfb->vram, rsvd_head, size, 1);
if (ret)
return ret;
ram->size = (ram->size & 0xffffff00) | ((ram->size & 0x000000ff) << 32);
ram->type = NV_MEM_TYPE_STOLEN;
ram->stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;
switch (nv_rd32(pfb, 0x100714) & 0x00000007) {
case 0: ram->type = NV_MEM_TYPE_DDR1; break;
case 1:
if (nouveau_fb_bios_memtype(bios) == NV_MEM_TYPE_DDR3)
ram->type = NV_MEM_TYPE_DDR3;
else
ram->type = NV_MEM_TYPE_DDR2;
break;
case 2: ram->type = NV_MEM_TYPE_GDDR3; break;
case 3: ram->type = NV_MEM_TYPE_GDDR4; break;
case 4: ram->type = NV_MEM_TYPE_GDDR5; break;
default:
switch (nv_rd32(pfb, 0x100714) & 0x00000007) {
case 0: ram->type = NV_MEM_TYPE_DDR1; break;
case 1:
if (nouveau_fb_bios_memtype(bios) == NV_MEM_TYPE_DDR3)
ram->type = NV_MEM_TYPE_DDR3;
else
ram->type = NV_MEM_TYPE_DDR2;
break;
case 2: ram->type = NV_MEM_TYPE_GDDR3; break;
case 3: ram->type = NV_MEM_TYPE_GDDR4; break;
case 4: ram->type = NV_MEM_TYPE_GDDR5; break;
default:
break;
}
ret = nouveau_mm_init(&pfb->vram, rsvd_head, size,
nv50_fb_vram_rblock(pfb, ram) >> 12);
if (ret)
return ret;
ram->ranks = (nv_rd32(pfb, 0x100200) & 0x4) ? 2 : 1;
ram->tags = nv_rd32(pfb, 0x100320);
break;
}
ret = nouveau_mm_init(&pfb->vram, rsvd_head, (ram->size >> 12) -
(rsvd_head + rsvd_tail),
nv50_fb_vram_rblock(pfb, ram) >> 12);
if (ret)
return ret;
ram->ranks = (nv_rd32(pfb, 0x100200) & 0x4) ? 2 : 1;
ram->tags = nv_rd32(pfb, 0x100320);
ram->get = nv50_ram_get;
ram->put = nv50_ram_put;
return 0;
}
static int
nv50_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 datasize,
struct nouveau_object **pobject)
{
struct nv50_ram *ram;
int ret;
ret = nv50_ram_create(parent, engine, oclass, &ram);
*pobject = nv_object(ram);
if (ret)
return ret;
return 0;
}
struct nouveau_oclass
nv50_ram_oclass = {
.handle = 0,
.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nv50_ram_create,
.ctor = nv50_ram_ctor,
.dtor = _nouveau_ram_dtor,
.init = _nouveau_ram_init,
.fini = _nouveau_ram_fini,
......
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include "nv50.h"
struct nva3_ram {
struct nouveau_ram base;
};
static int
nva3_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 datasize,
struct nouveau_object **pobject)
{
struct nva3_ram *ram;
int ret;
ret = nv50_ram_create(parent, engine, oclass, &ram);
*pobject = nv_object(ram);
if (ret)
return ret;
return 0;
}
struct nouveau_oclass
nva3_ram_oclass = {
.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nva3_ram_ctor,
.dtor = _nouveau_ram_dtor,
.init = _nouveau_ram_init,
.fini = _nouveau_ram_fini,
},
};
/*
* Copyright 2013 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include "nv50.h"
static int
nvaa_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 datasize,
struct nouveau_object **pobject)
{
const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */
const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */
struct nouveau_fb *pfb = nouveau_fb(parent);
struct nouveau_ram *ram;
int ret;
ret = nouveau_ram_create(parent, engine, oclass, &ram);
*pobject = nv_object(ram);
if (ret)
return ret;
ram->size = nv_rd32(pfb, 0x10020c);
ram->size = (ram->size & 0xffffff00) | ((ram->size & 0x000000ff) << 32);
ret = nouveau_mm_init(&pfb->vram, rsvd_head, (ram->size >> 12) -
(rsvd_head + rsvd_tail), 1);
if (ret)
return ret;
ram->type = NV_MEM_TYPE_STOLEN;
ram->stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;
ram->get = nv50_ram_get;
ram->put = nv50_ram_put;
return 0;
}
struct nouveau_oclass
nvaa_ram_oclass = {
.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvaa_ram_ctor,
.dtor = _nouveau_ram_dtor,
.init = _nouveau_ram_init,
.fini = _nouveau_ram_fini,
},
};
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