[AGPGART] More PCI Posting bugs.

Signed-off-by: Dave Jones <davej@redhat.com>

drivers/char/agp/amd64-agp.c

@@ -109,6 +109,7 @@ static int amd64_insert_memory(struct agp_memory *mem, off_t pg_start, int type)
 		pte |= GPTE_VALID | GPTE_COHERENT;
 
 		writel(pte, agp_bridge->gatt_table+j);
+		readl(agp_bridge->gatt_table+j);	/* PCI Posting. */
 	}
 	amd64_tlbflush(mem);
 	return 0;

drivers/char/agp/generic.c

@@ -760,8 +760,10 @@ int agp_generic_create_gatt_table(void)
 	agp_bridge->gatt_bus_addr = virt_to_phys(agp_bridge->gatt_table_real);
 
 	/* AK: bogus, should encode addresses > 4GB */
-	for (i = 0; i < num_entries; i++)
+	for (i = 0; i < num_entries; i++) {
 		writel(agp_bridge->scratch_page, agp_bridge->gatt_table+i);
+		readl(agp_bridge->gatt_table+i);	/* PCI Posting. */
+	}
 
 	return 0;
 }
@@ -877,8 +879,10 @@ int agp_generic_insert_memory(struct agp_memory * mem, off_t pg_start, int type)
 		mem->is_flushed = TRUE;
 	}
 
-	for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
+	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 		writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type), agp_bridge->gatt_table+j);
+		readl(agp_bridge->gatt_table+j);	/* PCI Posting. */
+	}
 
 	agp_bridge->driver->tlb_flush(mem);
 	return 0;
@@ -896,8 +900,10 @@ int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type)
 	}
 
 	/* AK: bogus, should encode addresses > 4GB */
-	for (i = pg_start; i < (mem->page_count + pg_start); i++)
+	for (i = pg_start; i < (mem->page_count + pg_start); i++) {
 		writel(agp_bridge->scratch_page, agp_bridge->gatt_table+i);
+		readl(agp_bridge->gatt_table+i);	/* PCI Posting. */
+	}
 
 	agp_bridge->driver->tlb_flush(mem);
 	return 0;

drivers/char/agp/nvidia-agp.c

@@ -214,9 +214,11 @@ static int nvidia_insert_memory(struct agp_memory *mem, off_t pg_start, int type
 		global_cache_flush();
 		mem->is_flushed = TRUE;
 	}
-	for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
+	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
 		writel(agp_bridge->driver->mask_memory(mem->memory[i], mem->type),
 			agp_bridge->gatt_table+nvidia_private.pg_offset+j);
+		readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j);	/* PCI Posting. */
+	}
 	agp_bridge->driver->tlb_flush(mem);
 	return 0;
 }