Commit 761441b9 authored by Avi Kivity's avatar Avi Kivity

KVM: x86 emulator: simplify emulate_2op_cl()

emulate_2op_cl() is always called with the same parameters.  Simplify
by passing just the emulation context.
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
Signed-off-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
parent a31b9cea
...@@ -263,40 +263,37 @@ struct gprefix { ...@@ -263,40 +263,37 @@ struct gprefix {
__emulate_2op_nobyte(ctxt, _op, "w", "r", _LO32, "r", "", "r") __emulate_2op_nobyte(ctxt, _op, "w", "r", _LO32, "r", "", "r")
/* Instruction has three operands and one operand is stored in ECX register */ /* Instruction has three operands and one operand is stored in ECX register */
#define __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, _suffix, _type) \ #define __emulate_2op_cl(_op, ctxt, _suffix, _type) \
do { \ do { \
unsigned long _tmp; \ unsigned long _tmp; \
_type _clv = (_cl).val; \ _type _clv = (ctxt)->src2.val; \
_type _srcv = (_src).val; \ _type _srcv = (ctxt)->src.val; \
_type _dstv = (_dst).val; \ _type _dstv = (ctxt)->dst.val; \
\ \
__asm__ __volatile__ ( \ __asm__ __volatile__ ( \
_PRE_EFLAGS("0", "5", "2") \ _PRE_EFLAGS("0", "5", "2") \
_op _suffix " %4,%1 \n" \ _op _suffix " %4,%1 \n" \
_POST_EFLAGS("0", "5", "2") \ _POST_EFLAGS("0", "5", "2") \
: "=m" (_eflags), "+r" (_dstv), "=&r" (_tmp) \ : "=m" ((ctxt)->eflags), "+r" (_dstv), "=&r" (_tmp) \
: "c" (_clv) , "r" (_srcv), "i" (EFLAGS_MASK) \ : "c" (_clv) , "r" (_srcv), "i" (EFLAGS_MASK) \
); \ ); \
\ \
(_cl).val = (unsigned long) _clv; \ (ctxt)->src2.val = (unsigned long) _clv; \
(_src).val = (unsigned long) _srcv; \ (ctxt)->src2.val = (unsigned long) _srcv; \
(_dst).val = (unsigned long) _dstv; \ (ctxt)->dst.val = (unsigned long) _dstv; \
} while (0) } while (0)
#define emulate_2op_cl(_op, _cl, _src, _dst, _eflags) \ #define emulate_2op_cl(ctxt, _op) \
do { \ do { \
switch ((_dst).bytes) { \ switch ((ctxt)->dst.bytes) { \
case 2: \ case 2: \
__emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \ __emulate_2op_cl(_op, ctxt, "w", u16); \
"w", unsigned short); \
break; \ break; \
case 4: \ case 4: \
__emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \ __emulate_2op_cl(_op, ctxt, "l", u32); \
"l", unsigned int); \
break; \ break; \
case 8: \ case 8: \
ON64(__emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \ ON64(__emulate_2op_cl(_op, ctxt, "q", ulong)); \
"q", unsigned long)); \
break; \ break; \
} \ } \
} while (0) } while (0)
...@@ -4123,7 +4120,7 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt) ...@@ -4123,7 +4120,7 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
break; break;
case 0xa4: /* shld imm8, r, r/m */ case 0xa4: /* shld imm8, r, r/m */
case 0xa5: /* shld cl, r, r/m */ case 0xa5: /* shld cl, r, r/m */
emulate_2op_cl("shld", ctxt->src2, ctxt->src, ctxt->dst, ctxt->eflags); emulate_2op_cl(ctxt, "shld");
break; break;
case 0xa8: /* push gs */ case 0xa8: /* push gs */
rc = emulate_push_sreg(ctxt, VCPU_SREG_GS); rc = emulate_push_sreg(ctxt, VCPU_SREG_GS);
...@@ -4137,7 +4134,7 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt) ...@@ -4137,7 +4134,7 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
break; break;
case 0xac: /* shrd imm8, r, r/m */ case 0xac: /* shrd imm8, r, r/m */
case 0xad: /* shrd cl, r, r/m */ case 0xad: /* shrd cl, r, r/m */
emulate_2op_cl("shrd", ctxt->src2, ctxt->src, ctxt->dst, ctxt->eflags); emulate_2op_cl(ctxt, "shrd");
break; break;
case 0xae: /* clflush */ case 0xae: /* clflush */
break; break;
......
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