Commit 768d134d authored by Jim Mattson's avatar Jim Mattson Committed by Paolo Bonzini

KVM: selftests: Introduce x2APIC register manipulation functions

Standardize reads and writes of the x2APIC MSRs.
Signed-off-by: default avatarJim Mattson <jmattson@google.com>
Reviewed-by: default avatarOliver Upton <oupton@google.com>
Message-Id: <20210604172611.281819-11-jmattson@google.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 4c63c923
......@@ -78,4 +78,14 @@ static inline void xapic_write_reg(unsigned int reg, uint32_t val)
((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2] = val;
}
static inline uint64_t x2apic_read_reg(unsigned int reg)
{
return rdmsr(APIC_BASE_MSR + (reg >> 4));
}
static inline void x2apic_write_reg(unsigned int reg, uint64_t value)
{
wrmsr(APIC_BASE_MSR + (reg >> 4), value);
}
#endif /* SELFTEST_KVM_APIC_H */
......@@ -38,9 +38,8 @@ void xapic_enable(void)
void x2apic_enable(void)
{
uint32_t spiv_reg = APIC_BASE_MSR + (APIC_SPIV >> 4);
wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) |
MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD);
wrmsr(spiv_reg, rdmsr(spiv_reg) | APIC_SPIV_APIC_ENABLED);
x2apic_write_reg(APIC_SPIV,
x2apic_read_reg(APIC_SPIV) | APIC_SPIV_APIC_ENABLED);
}
......@@ -55,8 +55,8 @@ static inline void sync_with_host(uint64_t phase)
void self_smi(void)
{
wrmsr(APIC_BASE_MSR + (APIC_ICR >> 4),
APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_SMI);
x2apic_write_reg(APIC_ICR,
APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_SMI);
}
void guest_code(void *arg)
......
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