Commit 77047ed7 authored by Frank Wunderlich's avatar Frank Wunderlich Committed by Heiko Stuebner

arm64: dts: rockchip: Add gmac1 and change network settings of bpi-r2-pro

New Version (v1.0) of R2 pro has swapped gmacs compared to the v00.

WAN-Port is now on gmac1 (RTL8211F) and lan-ports on gmac0 with mt7531
switch.

There is already a mt7531 dsa driver in mainline, but it needs to be
modified to work for this board.

Pre-1.0 version was not sold, so the setting can be savely overridden.

Fixes: f901aaad ("arm64: dts: rockchip: Add Bananapi R2 Pro")
Signed-off-by: default avatarFrank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20220402110045.104031-3-linux@fw-web.deSigned-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 6f277adf
...@@ -16,6 +16,7 @@ / { ...@@ -16,6 +16,7 @@ / {
aliases { aliases {
ethernet0 = &gmac0; ethernet0 = &gmac0;
ethernet1 = &gmac1;
mmc0 = &sdmmc0; mmc0 = &sdmmc0;
mmc1 = &sdhci; mmc1 = &sdhci;
}; };
...@@ -78,7 +79,6 @@ &gmac0 { ...@@ -78,7 +79,6 @@ &gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
clock_in_out = "input"; clock_in_out = "input";
phy-handle = <&rgmii_phy0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim pinctrl-0 = <&gmac0_miim
...@@ -90,8 +90,38 @@ &gmac0_rgmii_clk ...@@ -90,8 +90,38 @@ &gmac0_rgmii_clk
snps,reset-active-low; snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */ /* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>; snps,reset-delays-us = <0 20000 100000>;
tx_delay = <0x4f>;
rx_delay = <0x0f>;
status = "okay";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
&gmac1 {
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim
&gmac1m1_tx_bus2
&gmac1m1_rx_bus2
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus>;
snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
tx_delay = <0x3c>; tx_delay = <0x3c>;
rx_delay = <0x2f>; rx_delay = <0x2f>;
status = "okay"; status = "okay";
}; };
...@@ -315,8 +345,8 @@ &i2c5 { ...@@ -315,8 +345,8 @@ &i2c5 {
status = "disabled"; status = "disabled";
}; };
&mdio0 { &mdio1 {
rgmii_phy0: ethernet-phy@0 { rgmii_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22"; compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>; reg = <0x0>;
}; };
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment