Commit 77f6c763 authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher

drm/amdgpu: export mmhub sw_init into gmc

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0c8c0847
...@@ -533,6 +533,7 @@ static int gmc_v9_0_sw_init(void *handle) ...@@ -533,6 +533,7 @@ static int gmc_v9_0_sw_init(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
gfxhub_v1_0_init(adev); gfxhub_v1_0_init(adev);
mmhub_v1_0_init(adev);
spin_lock_init(&adev->mc.invalidate_lock); spin_lock_init(&adev->mc.invalidate_lock);
......
...@@ -348,19 +348,8 @@ void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, bool value) ...@@ -348,19 +348,8 @@ void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, bool value)
WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL), tmp); WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL), tmp);
} }
static int mmhub_v1_0_early_init(void *handle) void mmhub_v1_0_init(struct amdgpu_device *adev)
{ {
return 0;
}
static int mmhub_v1_0_late_init(void *handle)
{
return 0;
}
static int mmhub_v1_0_sw_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_MMHUB]; struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_MMHUB];
hub->ctx0_ptb_addr_lo32 = hub->ctx0_ptb_addr_lo32 =
...@@ -380,6 +369,20 @@ static int mmhub_v1_0_sw_init(void *handle) ...@@ -380,6 +369,20 @@ static int mmhub_v1_0_sw_init(void *handle)
hub->vm_l2_pro_fault_cntl = hub->vm_l2_pro_fault_cntl =
SOC15_REG_OFFSET(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL); SOC15_REG_OFFSET(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL);
}
static int mmhub_v1_0_early_init(void *handle)
{
return 0;
}
static int mmhub_v1_0_late_init(void *handle)
{
return 0;
}
static int mmhub_v1_0_sw_init(void *handle)
{
return 0; return 0;
} }
......
...@@ -28,6 +28,7 @@ int mmhub_v1_0_gart_enable(struct amdgpu_device *adev); ...@@ -28,6 +28,7 @@ int mmhub_v1_0_gart_enable(struct amdgpu_device *adev);
void mmhub_v1_0_gart_disable(struct amdgpu_device *adev); void mmhub_v1_0_gart_disable(struct amdgpu_device *adev);
void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev,
bool value); bool value);
void mmhub_v1_0_init(struct amdgpu_device *adev);
extern const struct amd_ip_funcs mmhub_v1_0_ip_funcs; extern const struct amd_ip_funcs mmhub_v1_0_ip_funcs;
extern const struct amdgpu_ip_block_version mmhub_v1_0_ip_block; extern const struct amdgpu_ip_block_version mmhub_v1_0_ip_block;
......
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