Commit 78272bba authored by Jesse Brandeburg's avatar Jesse Brandeburg Committed by David S. Miller

e1000e: workaround hw errata

There is a hardware errata in some revisions of the 82574 that needs
to be worked around in the driver by setting a register bit at init.

If this bit is not set A0 versions of the 82574 can generate
tx hangs.
Signed-off-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 71be7a36
...@@ -981,11 +981,15 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) ...@@ -981,11 +981,15 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
ew32(PBA_ECC, reg); ew32(PBA_ECC, reg);
} }
/* PCI-Ex Control Register */ /* PCI-Ex Control Registers */
if (hw->mac.type == e1000_82574) { if (hw->mac.type == e1000_82574) {
reg = er32(GCR); reg = er32(GCR);
reg |= (1 << 22); reg |= (1 << 22);
ew32(GCR, reg); ew32(GCR, reg);
reg = er32(GCR2);
reg |= 1;
ew32(GCR2, reg);
} }
return; return;
......
...@@ -206,6 +206,7 @@ enum e1e_registers { ...@@ -206,6 +206,7 @@ enum e1e_registers {
E1000_MANC2H = 0x05860, /* Management Control To Host - RW */ E1000_MANC2H = 0x05860, /* Management Control To Host - RW */
E1000_SW_FW_SYNC = 0x05B5C, /* Software-Firmware Synchronization - RW */ E1000_SW_FW_SYNC = 0x05B5C, /* Software-Firmware Synchronization - RW */
E1000_GCR = 0x05B00, /* PCI-Ex Control */ E1000_GCR = 0x05B00, /* PCI-Ex Control */
E1000_GCR2 = 0x05B64, /* PCI-Ex Control #2 */
E1000_FACTPS = 0x05B30, /* Function Active and Power State to MNG */ E1000_FACTPS = 0x05B30, /* Function Active and Power State to MNG */
E1000_SWSM = 0x05B50, /* SW Semaphore */ E1000_SWSM = 0x05B50, /* SW Semaphore */
E1000_FWSM = 0x05B54, /* FW Semaphore */ E1000_FWSM = 0x05B54, /* FW Semaphore */
......
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