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Commit 7901c2bc authored by Georgi Djakov's avatar Georgi Djakov Committed by Bjorn Andersson
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arm64: dts: qcom: sdm845: Increase the number of interconnect cells 

Increase the number of interconnect-cells, as now we can include
the tag information. The consumers can specify the path tag as an
additional argument to the endpoints.
Tested-by: default avatarSibi Sankar <sibis@codeaurora.org>
Reviewed-by: default avatarSibi Sankar <sibis@codeaurora.org>
Reviewed-by: default avatarMatthias Kaehlcke <mka@chromium.org>
Signed-off-by: default avatarGeorgi Djakov <georgi.djakov@linaro.org>
Link: https://lore.kernel.org/r/20200903133134.17201-6-georgi.djakov@linaro.orgSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent a9118250
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Showing with 24 additions and 24 deletions
arch/arm64/boot/dts/qcom/sdm845.dtsi
View file @ 7901c2bc
......@@ -200,7 +200,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
......@@ -225,7 +225,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_100>;
......@@ -247,7 +247,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_200>;
......@@ -269,7 +269,7 @@ &LITTLE_CPU_SLEEP_1
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_300>;
......@@ -291,7 +291,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <396>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_400>;
......@@ -313,7 +313,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <396>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_500>;
......@@ -335,7 +335,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <396>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_600>;
......@@ -357,7 +357,7 @@ &BIG_CPU_SLEEP_1
dynamic-power-coefficient = <396>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC &mem_noc SLAVE_EBI1>,
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
next-level-cache = <&L2_700>;
......@@ -2011,49 +2011,49 @@ pcie1_lane: lanes@1c06200 {
mem_noc: interconnect@1380000 {
compatible = "qcom,sdm845-mem-noc";
reg = <0 0x01380000 0 0x27200>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
dc_noc: interconnect@14e0000 {
compatible = "qcom,sdm845-dc-noc";
reg = <0 0x014e0000 0 0x400>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
config_noc: interconnect@1500000 {
compatible = "qcom,sdm845-config-noc";
reg = <0 0x01500000 0 0x5080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1620000 {
compatible = "qcom,sdm845-system-noc";
reg = <0 0x01620000 0 0x18080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sdm845-aggre1-noc";
reg = <0 0x016e0000 0 0x15080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre2_noc: interconnect@1700000 {
compatible = "qcom,sdm845-aggre2-noc";
reg = <0 0x01700000 0 0x1f300>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
compatible = "qcom,sdm845-mmss-noc";
reg = <0 0x01740000 0 0x1c100>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
......@@ -2156,9 +2156,9 @@ ipa: ipa@1e40000 {
clocks = <&rpmhcc RPMH_IPA_CLK>;
clock-names = "core";
interconnects = <&aggre2_noc MASTER_IPA &mem_noc SLAVE_EBI1>,
<&aggre2_noc MASTER_IPA &system_noc SLAVE_IMEM>,
<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_IPA_CFG>;
interconnects = <&aggre2_noc MASTER_IPA 0 &mem_noc SLAVE_EBI1 0>,
<&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
interconnect-names = "memory",
"imem",
"config";
......@@ -3569,8 +3569,8 @@ usb_1: usb@a6f8800 {
resets = <&gcc GCC_USB30_PRIM_BCR>;
interconnects = <&aggre2_noc MASTER_USB3_0 &mem_noc SLAVE_EBI1>,
<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_0>;
interconnects = <&aggre2_noc MASTER_USB3_0 0 &mem_noc SLAVE_EBI1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
interconnect-names = "usb-ddr", "apps-usb";
usb_1_dwc3: dwc3@a600000 {
......@@ -3617,8 +3617,8 @@ usb_2: usb@a8f8800 {
resets = <&gcc GCC_USB30_SEC_BCR>;
interconnects = <&aggre2_noc MASTER_USB3_1 &mem_noc SLAVE_EBI1>,
<&gladiator_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_1>;
interconnects = <&aggre2_noc MASTER_USB3_1 0 &mem_noc SLAVE_EBI1 0>,
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
interconnect-names = "usb-ddr", "apps-usb";
usb_2_dwc3: dwc3@a800000 {
......@@ -4043,7 +4043,7 @@ gpu: gpu@5000000 {
qcom,gmu = <&gmu>;
interconnects = <&mem_noc MASTER_GFX3D &mem_noc SLAVE_EBI1>;
interconnects = <&mem_noc MASTER_GFX3D 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "gfx-mem";
gpu_opp_table: opp-table {
......@@ -4360,7 +4360,7 @@ lpasscc: clock-controller@17014000 {
gladiator_noc: interconnect@17900000 {
compatible = "qcom,sdm845-gladiator-noc";
reg = <0 0x17900000 0 0xd080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
......
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