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Commit 79795c6c authored by karthik alapati's avatar karthik alapati Committed by Greg Kroah-Hartman
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staging: rtl8723bs: remove obsolete commented out code 

There is a bunch of messy, commented out code.  Just delete it.
Suggested-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: default avatarkarthik alapati <mail@karthek.com>
Link: https://lore.kernel.org/r/485415dbafc32710f1a8e3f7c951868f7738efe9.1613048573.git.mail@karthek.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 697805c7
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Showing with 2 additions and 38 deletions
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
View file @ 79795c6c
......@@ -57,8 +57,6 @@ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask)
return 0;
#endif
/* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); */
OriginalValue = rtw_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
......@@ -94,8 +92,6 @@ void PHY_SetBBReg_8723B(
return;
#endif
/* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */
if (BitMask != bMaskDWord) { /* if not "double word" write */
OriginalValue = rtw_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
......@@ -159,13 +155,9 @@ static u32 phy_RFSerialRead_8723B(
if (RfPiEnable) {
/* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */
retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi|MaskforPhySet, bLSSIReadBackData);
/* RT_DISP(FINIT, INIT_RF, ("Readback from RF-PI : 0x%x\n", retValue)); */
} else {
/* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */
retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack|MaskforPhySet, bLSSIReadBackData);
/* RT_DISP(FINIT, INIT_RF, ("Readback from RF-SI : 0x%x\n", retValue)); */
}
return retValue;
......@@ -230,15 +222,11 @@ static void phy_RFSerialWrite_8723B(
/* */
/* Put write addr in [5:0] and write data in [31:16] */
/* */
/* DataAndAddr = (Data<<16) | (NewOffset&0x3f); */
DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; /* T65 RF */
/* */
/* Write Operation */
/* */
PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
/* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]= 0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */
}
......@@ -473,7 +461,6 @@ int PHY_RFConfig8723B(struct adapter *Adapter)
rtStatus = PHY_RF6052_Config8723B(Adapter);
phy_LCK_8723B(Adapter);
/* PHY_BB8723B_Config_1T(Adapter); */
return rtStatus;
}
......@@ -580,8 +567,6 @@ u8 PHY_GetTxPowerIndex(
s8 txPower = 0, powerDiffByRate = 0, limit = 0;
bool bIn24G = false;
/* DBG_871X("===>%s\n", __func__); */
txPower = (s8) PHY_GetTxPowerIndexBase(padapter, RFPath, Rate, BandWidth, Channel, &bIn24G);
powerDiffByRate = PHY_GetTxPowerByRate(padapter, BAND_ON_2_4G, ODM_RF_PATH_A, RF_1TX, Rate);
......@@ -603,7 +588,6 @@ u8 PHY_GetTxPowerIndex(
if (txPower > MAX_POWER_INDEX)
txPower = MAX_POWER_INDEX;
/* DBG_871X("Final Tx Power(RF-%c, Channel: %d) = %d(0x%X)\n", ((RFPath == 0)?'A':'B'), Channel, txPower, txPower)); */
return (u8) txPower;
}
......@@ -750,8 +734,6 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter)
PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
/* PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); */
PHY_SetBBReg(Adapter, rOFDM0_TxPseudoNoiseWgt, (BIT31|BIT30), 0x0);
break;
......@@ -766,15 +748,9 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter)
PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
/* PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); */
PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
break;
default:
/*RT_TRACE(COMP_DBG, DBG_LOUD, ("phy_SetBWMode8723B(): unknown Bandwidth: %#X\n"\
, pHalData->CurrentChannelBW));*/
break;
}
......@@ -787,10 +763,8 @@ static void phy_SwChnl8723B(struct adapter *padapter)
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
u8 channelToSW = pHalData->CurrentChannel;
if (pHalData->rf_chip == RF_PSEUDO_11N) {
/* RT_TRACE(COMP_MLME, DBG_LOUD, ("phy_SwChnl8723B: return for PSEUDO\n")); */
if (pHalData->rf_chip == RF_PSEUDO_11N)
return;
}
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff00) | channelToSW);
PHY_SetRFReg(padapter, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]);
PHY_SetRFReg(padapter, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]);
......@@ -802,7 +776,6 @@ static void phy_SwChnlAndSetBwMode8723B(struct adapter *Adapter)
{
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
/* RT_TRACE(COMP_SCAN, DBG_LOUD, ("phy_SwChnlAndSetBwMode8723B(): bSwChnl %d, bSetChnlBW %d\n", pHalData->bSwChnl, pHalData->bSetChnlBW)); */
if (Adapter->bNotifyChannelChange) {
DBG_871X("[%s] bSwChnl =%d, ch =%d, bSetChnlBW =%d, bw =%d\n",
__func__,
......@@ -847,8 +820,6 @@ static void PHY_HandleSwChnlAndSetBW8723B(
u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC;
u8 tmpCenterFrequencyIndex1 = pHalData->CurrentCenterFrequencyIndex1;
/* DBG_871X("=> PHY_HandleSwChnlAndSetBW8812: bSwitchChannel %d, bSetBandWidth %d\n", bSwitchChannel, bSetBandWidth); */
/* check is swchnl or setbw */
if (!bSwitchChannel && !bSetBandWidth) {
DBG_871X("PHY_HandleSwChnlAndSetBW8812: not switch channel and not set bandwidth\n");
......@@ -857,7 +828,6 @@ static void PHY_HandleSwChnlAndSetBW8723B(
/* skip change for channel or bandwidth is the same */
if (bSwitchChannel) {
/* if (pHalData->CurrentChannel != ChannelNum) */
{
if (HAL_IsLegalChannel(Adapter, ChannelNum))
pHalData->bSwChnl = true;
......@@ -867,10 +837,8 @@ static void PHY_HandleSwChnlAndSetBW8723B(
if (bSetBandWidth)
pHalData->bSetChnlBW = true;
if (!pHalData->bSetChnlBW && !pHalData->bSwChnl) {
/* DBG_871X("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d\n", pHalData->bSwChnl, pHalData->bSetChnlBW); */
if (!pHalData->bSetChnlBW && !pHalData->bSwChnl)
return;
}
if (pHalData->bSwChnl) {
......@@ -929,9 +897,5 @@ void PHY_SetSwChnlBWMode8723B(
u8 Offset80
)
{
/* DBG_871X("%s() ===>\n", __func__); */
PHY_HandleSwChnlAndSetBW8723B(Adapter, true, true, channel, Bandwidth, Offset40, Offset80, channel);
/* DBG_871X("<==%s()\n", __func__); */
}
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