Commit 79c8be83 authored by Myron Stowe's avatar Myron Stowe Committed by Jesse Barnes

PCI: PowerPC: convert pcibios_set_master() to a non-inlined function

This patch converts PowerPC's architecture-specific
'pcibios_set_master()' routine to a non-inlined function.  This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.

Converting 'pci_bios_set_master()' to a non-inlined function will
allow PowerPC's 'pcibios_set_master()' implementation to remain
architecture-specific after the generic version is introduced and
thus, not change current behavior.

No functional change.
Acked-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarMyron Stowe <myron.stowe@redhat.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent b51d4a3e
...@@ -46,11 +46,6 @@ struct pci_dev; ...@@ -46,11 +46,6 @@ struct pci_dev;
#define pcibios_assign_all_busses() \ #define pcibios_assign_all_busses() \
(pci_has_flag(PCI_REASSIGN_ALL_BUS)) (pci_has_flag(PCI_REASSIGN_ALL_BUS))
static inline void pcibios_set_master(struct pci_dev *dev)
{
/* No special bus mastering setup handling */
}
static inline void pcibios_penalize_isa_irq(int irq, int active) static inline void pcibios_penalize_isa_irq(int irq, int active)
{ {
/* We don't do dynamic PCI IRQ allocation */ /* We don't do dynamic PCI IRQ allocation */
......
...@@ -1118,6 +1118,11 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus) ...@@ -1118,6 +1118,11 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
} }
} }
void pcibios_set_master(struct pci_dev *dev)
{
/* No special bus mastering setup handling */
}
void __devinit pcibios_fixup_bus(struct pci_bus *bus) void __devinit pcibios_fixup_bus(struct pci_bus *bus)
{ {
/* When called from the generic PCI probe, read PCI<->PCI bridge /* When called from the generic PCI probe, read PCI<->PCI bridge
......
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