Commit 79f678ed authored by Daniel Kurtz's avatar Daniel Kurtz Committed by Wolfram Sang

i2c: s3c2410: do not special case HDMIPHY stuck bus detection

Commit "i2c-s3c2410: Add HDMIPHY quirk for S3C2440" added support for
HDMIPHY with some special handling in s3c24xx_i2c_set_master:

"due to unknown reason (probably HW bug in HDMIPHY and/or the controller)
a transfer fails to finish. The controller hangs after sending the last
byte, the workaround for this bug is resetting the controller after each
transfer"

The "unknown reason" was that the proper sequence for generating a STOP
condition wasn't being followed as per the datasheet. Since this is fixed
by "PATCH: i2c-s3c2410: do not generate STOP for QUIRK_HDMIPHY buses",
remove the special handling.
Signed-off-by: default avatarDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: default avatarNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: default avatarWolfram Sang <w.sang@pengutronix.de>
parent fe724bf9
......@@ -532,13 +532,6 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
unsigned long iicstat;
int timeout = 400;
/* the timeout for HDMIPHY is reduced to 10 ms because
* the hangup is expected to happen, so waiting 400 ms
* causes only unnecessary system hangup
*/
if (i2c->quirks & QUIRK_HDMIPHY)
timeout = 10;
while (timeout-- > 0) {
iicstat = readl(i2c->regs + S3C2410_IICSTAT);
......@@ -548,15 +541,6 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
msleep(1);
}
/* hang-up of bus dedicated for HDMIPHY occurred, resetting */
if (i2c->quirks & QUIRK_HDMIPHY) {
writel(0, i2c->regs + S3C2410_IICCON);
writel(0, i2c->regs + S3C2410_IICSTAT);
writel(0, i2c->regs + S3C2410_IICDS);
return 0;
}
return -ETIMEDOUT;
}
......
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