Commit 7acc17b1 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

arm64: dts: renesas: draak: Sort device nodes

- Device nodes with unit addresses are sorted by unit address,
  - Device nodes without unit addresses and references are sorted
    alphabetically.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 9bc03b57
...@@ -24,38 +24,6 @@ chosen { ...@@ -24,38 +24,6 @@ chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
vga {
compatible = "vga-connector";
port {
vga_in: endpoint {
remote-endpoint = <&adv7123_out>;
};
};
};
vga-encoder {
compatible = "adi,adv7123";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7123_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7123_out: endpoint {
remote-endpoint = <&vga_in>;
};
};
};
};
composite-in { composite-in {
compatible = "composite-video-connector"; compatible = "composite-video-connector";
...@@ -101,76 +69,86 @@ reg_3p3v: regulator1 { ...@@ -101,76 +69,86 @@ reg_3p3v: regulator1 {
regulator-always-on; regulator-always-on;
}; };
x12_clk: x12 { vga {
compatible = "fixed-clock"; compatible = "vga-connector";
#clock-cells = <0>;
clock-frequency = <74250000>;
};
};
&extal_clk {
clock-frequency = <48000000>;
};
&pfc { port {
avb0_pins: avb { vga_in: endpoint {
mux { remote-endpoint = <&adv7123_out>;
groups = "avb0_link", "avb0_mdio", "avb0_mii"; };
function = "avb0";
}; };
}; };
du_pins: du { vga-encoder {
groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; compatible = "adi,adv7123";
function = "du";
};
i2c0_pins: i2c0 { ports {
groups = "i2c0"; #address-cells = <1>;
function = "i2c0"; #size-cells = <0>;
};
i2c1_pins: i2c1 { port@0 {
groups = "i2c1"; reg = <0>;
function = "i2c1"; adv7123_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7123_out: endpoint {
remote-endpoint = <&vga_in>;
};
};
};
}; };
pwm0_pins: pwm0 { x12_clk: x12 {
groups = "pwm0_c"; compatible = "fixed-clock";
function = "pwm0"; #clock-cells = <0>;
clock-frequency = <74250000>;
}; };
};
pwm1_pins: pwm1 { &avb {
groups = "pwm1_c"; pinctrl-0 = <&avb0_pins>;
function = "pwm1"; pinctrl-names = "default";
}; renesas,no-ether-link;
phy-handle = <&phy0>;
phy-mode = "rgmii-txid";
status = "okay";
scif2_pins: scif2 { phy0: ethernet-phy@0 {
groups = "scif2_data"; rxc-skew-ps = <1500>;
function = "scif2"; reg = <0>;
interrupt-parent = <&gpio5>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
}; };
};
sdhi2_pins: sd2 { &du {
groups = "mmc_data8", "mmc_ctrl"; pinctrl-0 = <&du_pins>;
function = "mmc"; pinctrl-names = "default";
power-source = <1800>; status = "okay";
};
sdhi2_pins_uhs: sd2_uhs { clocks = <&cpg CPG_MOD 724>,
groups = "mmc_data8", "mmc_ctrl"; <&cpg CPG_MOD 723>,
function = "mmc"; <&x12_clk>;
power-source = <1800>; clock-names = "du.0", "du.1", "dclkin.0";
};
usb0_pins: usb0 { ports {
groups = "usb0"; port@0 {
function = "usb0"; endpoint {
remote-endpoint = <&adv7123_in>;
};
};
}; };
};
vin4_pins_cvbs: vin4 { &ehci0 {
groups = "vin4_data8", "vin4_sync", "vin4_clk"; status = "okay";
function = "vin4"; };
};
&extal_clk {
clock-frequency = <48000000>;
}; };
&i2c0 { &i2c0 {
...@@ -178,12 +156,6 @@ &i2c0 { ...@@ -178,12 +156,6 @@ &i2c0 {
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
eeprom@50 {
compatible = "rohm,br24t01", "atmel,24c01";
reg = <0x50>;
pagesize = <8>;
};
composite-in@20 { composite-in@20 {
compatible = "adi,adv7180cp"; compatible = "adi,adv7180cp";
reg = <0x20>; reg = <0x20>;
...@@ -254,6 +226,12 @@ adv7612_out: endpoint { ...@@ -254,6 +226,12 @@ adv7612_out: endpoint {
}; };
}; };
}; };
eeprom@50 {
compatible = "rohm,br24t01", "atmel,24c01";
reg = <0x50>;
pagesize = <8>;
};
}; };
&i2c1 { &i2c1 {
...@@ -262,47 +240,88 @@ &i2c1 { ...@@ -262,47 +240,88 @@ &i2c1 {
status = "okay"; status = "okay";
}; };
&du { &ohci0 {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay"; status = "okay";
};
clocks = <&cpg CPG_MOD 724>, &pfc {
<&cpg CPG_MOD 723>, avb0_pins: avb {
<&x12_clk>; mux {
clock-names = "du.0", "du.1", "dclkin.0"; groups = "avb0_link", "avb0_mdio", "avb0_mii";
function = "avb0";
ports {
port@0 {
endpoint {
remote-endpoint = <&adv7123_in>;
};
}; };
}; };
};
&ehci0 { du_pins: du {
status = "okay"; groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
function = "du";
};
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";
};
i2c1_pins: i2c1 {
groups = "i2c1";
function = "i2c1";
};
pwm0_pins: pwm0 {
groups = "pwm0_c";
function = "pwm0";
};
pwm1_pins: pwm1 {
groups = "pwm1_c";
function = "pwm1";
};
scif2_pins: scif2 {
groups = "scif2_data";
function = "scif2";
};
sdhi2_pins: sd2 {
groups = "mmc_data8", "mmc_ctrl";
function = "mmc";
power-source = <1800>;
};
sdhi2_pins_uhs: sd2_uhs {
groups = "mmc_data8", "mmc_ctrl";
function = "mmc";
power-source = <1800>;
};
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
};
vin4_pins_cvbs: vin4 {
groups = "vin4_data8", "vin4_sync", "vin4_clk";
function = "vin4";
};
}; };
&ohci0 { &pwm0 {
pinctrl-0 = <&pwm0_pins>;
pinctrl-names = "default";
status = "okay"; status = "okay";
}; };
&avb { &pwm1 {
pinctrl-0 = <&avb0_pins>; pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
renesas,no-ether-link;
phy-handle = <&phy0>;
phy-mode = "rgmii-txid";
status = "okay"; status = "okay";
};
phy0: ethernet-phy@0 { &rwdt {
rxc-skew-ps = <1500>; timeout-sec = <60>;
reg = <0>; status = "okay";
interrupt-parent = <&gpio5>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
};
}; };
&scif2 { &scif2 {
...@@ -333,25 +352,6 @@ &usb2_phy0 { ...@@ -333,25 +352,6 @@ &usb2_phy0 {
status = "okay"; status = "okay";
}; };
&pwm0 {
pinctrl-0 = <&pwm0_pins>;
pinctrl-names = "default";
status = "okay";
};
&pwm1 {
pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default";
status = "okay";
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
&vin4 { &vin4 {
pinctrl-0 = <&vin4_pins_cvbs>; pinctrl-0 = <&vin4_pins_cvbs>;
pinctrl-names = "default"; pinctrl-names = "default";
......
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